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EP0704901
European procedure
Extract from the Register of European Patents
EP About this file: EP0704901
| EP0704901 - Tolerant integrated circuit to great manufacturing faults [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 13.10.2000 Database last updated on 16.09.2024 | Most recent event Tooltip | 13.10.2000 | No opposition filed within time limit | published on 29.11.2000 [2000/48] | Applicant(s) | For all designated states STMicroelectronics Srl Via C. Olivetti, 2 20041 Agrate Brianza (Milano) / IT | [N/P] |
| Former [1998/35] | For all designated states STMicroelectronics S.r.l. Via C. Olivetti, 2 20041 Agrate Brianza (Milano) / IT | ||
| Former [1996/14] | For all designated states SGS-THOMSON MICROELECTRONICS S.r.l. Via C. Olivetti, 2 I-20041 Agrate Brianza (Milano) / IT | Inventor(s) | 01 /
Mazzali, Stefano Via Sardegna, 21 I-20040 Carnate (Milano) / IT | [1996/14] | Representative(s) | Botti, Mario Botti & Ferrari S.p.A. Via Cappellini, 11 20124 Milano / IT | [N/P] |
| Former [1999/17] | Botti, Mario Botti & Ferrari S.r.l. Via Locatelli, 5 20124 Milano / IT | ||
| Former [1998/13] | Checcacci, Giorgio, et al PORTA, CHECCACCI & BOTTI Viale Sabotino, 19/2 20135 Milano / IT | ||
| Former [1997/45] | Checcacci, Giorgio, et al PORTA, CHECCACCI & BOTTI Corso di Porta Romana, 123 20122 Milano / IT | Application number, filing date | 94830468.8 | 30.09.1994 | [1996/14] | Filing language | IT | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP0704901 | Date: | 03.04.1996 | Language: | EN | [1996/14] | Type: | A1 / A2 RE Reissue of A-publication | No.: | EP0704901 | Date: | 24.07.1996 | [1996/30] | Type: | B1 Patent specification | No.: | EP0704901 | Date: | 15.12.1999 | Language: | EN | [1999/50] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 10.03.1995 | Classification | IPC: | H01L23/528, H01L27/115 | [1996/14] | CPC: |
H01L23/528 (EP,US);
H10B69/00 (EP,US);
H01L2924/0002 (EP,US)
| C-Set: |
H01L2924/0002, H01L2924/00 (EP,US)
| Designated contracting states | DE, FR, GB, IT [1996/14] | Title | German: | Integrierte Schaltung mit Toleranz bei wichtigen Herstellungsfehlern | [1996/14] | English: | Tolerant integrated circuit to great manufacturing faults | [1996/14] | French: | Circuit intégré tolérant des défauts majeurs de fabrication | [1996/14] | Examination procedure | 25.09.1996 | Examination requested [1996/50] | 29.04.1997 | Despatch of a communication from the examining division (Time limit: M04) | 08.09.1997 | Reply to a communication from the examining division | 17.03.1998 | Despatch of a communication from the examining division (Time limit: M06) | 28.10.1998 | Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time | 07.01.1999 | Reply to a communication from the examining division | 03.03.1999 | Despatch of communication of intention to grant (Approval: Yes) | 19.05.1999 | Communication of intention to grant the patent | 07.09.1999 | Fee for grant paid | 07.09.1999 | Fee for publishing/printing paid | Opposition(s) | 16.09.2000 | No opposition filed within time limit [2000/48] | Request for further processing for: | 07.09.1999 | Request for further processing filed | 07.09.1999 | Full payment received (date of receipt of payment) Request granted | 27.09.1999 | Decision despatched | 07.01.1999 | Request for further processing filed | 23.11.1998 | Full payment received (date of receipt of payment) Request deemed not to be filed | 02.02.1999 | Decision despatched | Fees paid | Renewal fee | 23.09.1996 | Renewal fee patent year 03 | 20.09.1997 | Renewal fee patent year 04 | 22.09.1998 | Renewal fee patent year 05 | 28.09.1999 | Renewal fee patent year 06 |
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