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EP0669568
European procedure
Extract from the Register of European Patents
EP About this file: EP0669568
| EP0669568 - Microprocessor malfunction operation preventing circuit [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 19.03.2004 Database last updated on 24.08.2024 | Most recent event Tooltip | 19.03.2004 | No opposition filed within time limit | published on 06.05.2004 [2004/19] | Applicant(s) | For all designated states SANYO ELECTRIC CO., LTD. 5-5, Keihan-Hondori 2-chome, Moriguchi-shi Osaka-fu / JP | [N/P] |
| Former [2003/35] | For all designated states Sanyo Electric Co., Ltd. 5-5, Keihan-Hondori 2-chome Moriguchi-shi, Osaka-fu / JP | ||
| Former [1995/35] | For all designated states SANYO ELECTRIC CO., LTD. 18, Keihanhondori 2-chome Moriguchi-shi, Osaka / JP | Inventor(s) | 01 /
Suwa, Kazuyoshi 349-3, Nagate Oota-shi, Gunma-ken / JP | 02 /
Yokoyama, Masao 1455-304, Ryumai Oota-shi, Gunma-ken / JP | [1995/35] | Representative(s) | Glawe, Delfs, Moll Partnerschaft mbB von Patent- und Rechtsanwälten Postfach 26 01 62 80058 München / DE | [N/P] |
| Former [1995/35] | Glawe, Delfs, Moll & Partner Patentanwälte Postfach 26 01 62 D-80058 München / DE | Application number, filing date | 95102695.4 | 24.02.1995 | [1995/35] | Priority number, date | JP19940054716 | 28.02.1994 Original published format: JP 5471694 | [1995/35] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0669568 | Date: | 30.08.1995 | Language: | EN | [1995/35] | Type: | A3 Search report | No.: | EP0669568 | Date: | 15.03.2000 | [2000/11] | Type: | B1 Patent specification | No.: | EP0669568 | Date: | 14.05.2003 | Language: | EN | [2003/20] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 01.02.2000 | Classification | IPC: | G06F1/30, G06F1/28, G06F1/24 | [2000/11] | CPC: |
G06F1/24 (EP,US);
G06F11/00 (KR);
G06F1/28 (EP,US);
G06F1/30 (EP,US)
|
| Former IPC [1995/35] | G06F1/24 | Designated contracting states | DE, ES, FR, GB, IT [1995/35] | Title | German: | Schutzschaltung zur Vermeidung einer fehlerhaften Opération des Mikroprozessors | [1995/35] | English: | Microprocessor malfunction operation preventing circuit | [1995/35] | French: | Circuit de prévention pour éviter une opération erronée du microprocesseur | [1995/35] | Examination procedure | 25.10.1995 | Examination requested [1995/51] | 02.05.2002 | Despatch of a communication from the examining division (Time limit: M04) | 04.09.2002 | Reply to a communication from the examining division | 31.10.2002 | Communication of intention to grant the patent | 10.03.2003 | Fee for grant paid | 10.03.2003 | Fee for publishing/printing paid | Opposition(s) | 17.02.2004 | No opposition filed within time limit [2004/19] | Fees paid | Renewal fee | 18.02.1997 | Renewal fee patent year 03 | 16.02.1998 | Renewal fee patent year 04 | 18.02.1999 | Renewal fee patent year 05 | 21.02.2000 | Renewal fee patent year 06 | 15.02.2001 | Renewal fee patent year 07 | 20.02.2002 | Renewal fee patent year 08 | 20.02.2003 | Renewal fee patent year 09 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [PXY]EP0604270 (SGS THOMSON MICROELECTRONICS [FR]) [PX] 1 * column 1, line 39 - column 2, line 23 * * column 8, line 6 - line 44 * [PY] 2,3; | [YA]JPS61121117 ; | [A]US5019996 (LEE SAI-KEUNG [US]) [A] 1,3 * column 3, line 59 - line 64; figure 1 * * column 3, line 11 - line 61 * * column 7, line 11 - line 16 * | [YA] - PATENT ABSTRACTS OF JAPAN, (19861021), vol. 010, no. 308, Database accession no. (P - 508), & JP61121117 A 19860609 (MATSUSHITA ELECTRIC IND CO LTD) [Y] 2,3 * abstract * [A] 1 |