EP0684650 - SiGe thin film semiconductor device with SiGe layer structure and method of fabrication [Right-click to bookmark this link] | |||
Former [1995/48] | SiGe thin film semiconductor device or SiGe layer structure and method of fabrication | ||
[2000/45] | Status | No opposition filed within time limit Status updated on 05.07.2002 Database last updated on 03.10.2024 | Most recent event Tooltip | 19.06.2009 | Change - representative | published on 22.07.2009 [2009/30] | Applicant(s) | For all designated states MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 1006, Oaza Kadoma Kadoma-shi Osaka 571-8501 / JP | [2008/47] |
Former [2001/35] | For all designated states MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 1006, Ohaza Kadoma Kadoma-shi, Osaka 571-8501 / JP | ||
Former [1995/48] | For all designated states MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 1006, Ohaza Kadoma Kadoma-shi, Osaka 571 / JP | Inventor(s) | 01 /
Tsutsu, Hiroshi 1-5-7-1011, Tomobuchi-cho, Miyakojima-ku Osaka-shi, Osaka / JP | [1995/48] | Representative(s) | Kügele, Bernhard, et al Novagraaf International SA Chemin de l'Echo 3 1213 Onex / CH | [N/P] |
Former [2009/30] | Kügele, Bernhard, et al Novagraaf International SA Avenue de Pailly 25 1220 Les Avanchets-Genève / CH | ||
Former [1995/48] | Kügele, Bernhard, et al NOVAPAT-CABINET CHEREAU, 9, Rue du Valais CH-1202 Genève / CH | Application number, filing date | 95107868.2 | 23.05.1995 | [1995/48] | Priority number, date | JP19940109233 | 24.05.1994 Original published format: JP 10923394 | [1995/48] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0684650 | Date: | 29.11.1995 | Language: | EN | [1995/48] | Type: | A3 Search report | No.: | EP0684650 | Date: | 10.09.1997 | [1997/37] | Type: | B1 Patent specification | No.: | EP0684650 | Date: | 29.08.2001 | Language: | EN | [2001/35] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 29.07.1997 | Classification | IPC: | H01L29/786, H01L21/336, H01L29/78, H01L29/49, H01L29/51, H01L23/532, H01L21/321, H01L21/768 | [1997/36] | CPC: |
H01L29/6659 (EP,US);
H01L21/2807 (EP,US);
H01L29/4908 (EP,US);
H01L29/66742 (EP,US);
H01L29/78684 (EP,US);
H01L2924/0002 (EP,US)
| C-Set: |
H01L2924/0002, H01L2924/00 (EP,US)
|
Former IPC [1995/48] | H01L29/786, H01L21/336, H01L29/78, H01L29/49, H01L29/51, H01L23/532 | Designated contracting states | DE, FR, NL [1995/48] | Title | German: | SiGe-Dünnfilm-Halbleiteranordnung mit SiGe Schichtstruktur und Verfahren zur Herstellung | [2000/45] | English: | SiGe thin film semiconductor device with SiGe layer structure and method of fabrication | [2000/45] | French: | Dispositif semi-conducteur à couche mince avec structure d'une couche de SiGe et sa méthode de fabrication | [2000/45] |
Former [1995/48] | SiGe-Dunnfilm-Halbleiteranordnung oder SiGe Schichtstruktur und Verfahren zur Herstellung | ||
Former [1995/48] | SiGe thin film semiconductor device or SiGe layer structure and method of fabrication | ||
Former [1995/48] | Dispositif semi-conducteur à couche mince avec du SiGe ou structure d'une couche de SiGe et sa méthode de fabrication | Examination procedure | 26.05.1995 | Examination requested [1995/48] | 15.12.1998 | Despatch of a communication from the examining division (Time limit: M04) | 09.04.1999 | Reply to a communication from the examining division | 03.05.1999 | Despatch of a communication from the examining division (Time limit: M04) | 06.09.1999 | Reply to a communication from the examining division | 30.11.2000 | Despatch of communication of intention to grant (Approval: Yes) | 29.01.2001 | Communication of intention to grant the patent | 14.03.2001 | Fee for grant paid | 14.03.2001 | Fee for publishing/printing paid | Divisional application(s) | EP99107808.0 / EP0935292 | Opposition(s) | 30.05.2002 | No opposition filed within time limit [2002/34] | Fees paid | Renewal fee | 23.05.1997 | Renewal fee patent year 03 | 26.05.1998 | Renewal fee patent year 04 | 19.05.1999 | Renewal fee patent year 05 | 15.05.2000 | Renewal fee patent year 06 | 18.05.2001 | Renewal fee patent year 07 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [X]JPH01235276 ; | [Y]EP0061388 (FAIRCHILD CAMERA INSTR CO [US]) [Y] 12,13 * abstract * * page 5, line 1 - page 6, line 3 *; | [A]EP0449620 (TOSHIBA KK [JP]) [A] 1,2,4,5 * column 5, line 58 - column 6, line 17; figures 1,3 * * column 3, line 26 - line 50 *; | [XY]EP0587520 (IBM [US]) [X] 1-3,7-9,14 * column 10, line 30 - column 11, line 56; figures 1,4 * [Y] 4,5,10,15,16; | [XY] - PARK S -G ET AL, "Kinetics and mechanism of wet oxidation of Ge/sub x/Si/sub 1-x/ alloys", JOURNAL OF APPLIED PHYSICS, 1 FEB. 1994, USA, ISSN 0021-8979, vol. 75, no. 3, pages 1764 - 1770, XP000615103 [X] 11 * C case *;; figure 1A * * page 1764, column R * [Y] 4,10,12,13,15,16 DOI: http://dx.doi.org/10.1063/1.356368 | [Y] - OKADA H ET AL, "High-mobility amorphous-silicon MOS transistors", JAPANESE JOURNAL OF APPLIED PHYSICS, PART 2 (LETTERS), SEPT. 1986, JAPAN, ISSN 0021-4922, vol. 25, no. 9, pages L718 - L721, XP000021844 [Y] 5 * page L719, column L; figure 2 * | [X] - PATENT ABSTRACTS OF JAPAN, (19891214), vol. 013, no. 564, Database accession no. (E - 860), & JP01235276 A 19890920 (SONY CORP) [X] 1,2,7 * abstract * | [A] - TSU-JAE KING ET AL, "PMOS TRANSISTORS IN LPCVD POLYCRYSTALLINE SILICON-GERMANIUM FILMS", IEEE ELECTRON DEVICE LETTERS, (19911101), vol. 12, no. 11, pages 584 - 586, XP000228169 [A] 1-3,7-9,14 * figure 1; table I * DOI: http://dx.doi.org/10.1109/55.119205 | [A] - HUANG-CHUNG CHENG ET AL, "Characteristics of polycrystalline silicon thin-film transistors with thin oxide/nitride gate structures", OPTICAL ENGINEERING, AUG. 1993, USA, ISSN 0091-3286, vol. 32, no. 8, pages 1798 - 1802, XP000615105 [A] 1,5,6 * page 1801, column R * DOI: http://dx.doi.org/10.1117/12.143982 |