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Extract from the Register of European Patents

EP About this file: EP0689131

EP0689131 - A computer system for executing branch instructions [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  05.07.2002
Database last updated on 20.09.2024
Most recent event   Tooltip04.01.2008Lapse of the patent in a contracting state
New state(s): IT
published on 06.02.2008  [2008/06]
Applicant(s)For all designated states
STMicroelectronics Limited
1000 Aztec West, Almondsbury
Bristol BS12 4SQ / GB
[N/P]
Former [1999/08]For all designated states
STMicroelectronics Limited
1000 Aztec West, Almondsbury
Bristol BS12 4SQ / GB
Former [1995/52]For all designated states
SGS-THOMSON MICROELECTRONICS LTD.
1000 Aztec West, Almondsbury
Bristol BS12 4SQ / GB
Inventor(s)01 / Sturges, Andrew Craig
3 Wellington Avenue
Montpelier, Bristol BS6 5HP / GB
02 / Sidwell, Nathan Mackenzie
21 Cleave Street
St. Werburghs, Bristol BS2 9UD / GB
[1995/52]
Representative(s)Driver, Virginia Rozanne, et al
Page White & Farrer Limited
Bedford House
21A John Street
London WC1N 2BF / GB
[N/P]
Former [1995/52]Driver, Virginia Rozanne, et al
Page White & Farrer 54 Doughty Street
London WC1N 2LS / GB
Application number, filing date95304199.316.06.1995
[1995/52]
Priority number, dateGB1994001248722.06.1994         Original published format: GB 9412487
[1995/52]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP0689131
Date:27.12.1995
Language:EN
[1995/52]
Type: B1 Patent specification 
No.:EP0689131
Date:29.08.2001
Language:EN
[2001/35]
Search report(s)(Supplementary) European search report - dispatched on:EP07.09.1995
ClassificationIPC:G06F9/38
[1995/52]
CPC:
G06F9/3804 (EP,US); G06F9/3842 (EP,US)
Designated contracting statesDE,   FR,   GB,   IT [1995/52]
TitleGerman:Computersystem zur Ausführung von Verzweigungsbefehlen[2000/49]
English:A computer system for executing branch instructions[1995/52]
French:Système d'ordinateur pour éxécuter des instructions de branchement[2000/22]
Former [1995/52]Rechnersystem zur Ausführung von Verzweigungsbefehlen
Former [1995/52]Système calculateur d'éxécution des instructions de branchement
Examination procedure25.06.1996Examination requested  [1996/34]
09.07.1997Amendment by applicant (claims and/or description)
24.06.1999Despatch of a communication from the examining division (Time limit: M04)
20.10.1999Reply to a communication from the examining division
26.10.2000Despatch of communication of intention to grant (Approval: Yes)
22.02.2001Communication of intention to grant the patent
14.05.2001Fee for grant paid
14.05.2001Fee for publishing/printing paid
Divisional application(s)EP00102080.9  / EP1003095
Opposition(s)30.05.2002No opposition filed within time limit [2002/34]
Fees paidRenewal fee
30.06.1997Renewal fee patent year 03
25.06.1998Renewal fee patent year 04
25.06.1999Renewal fee patent year 05
27.06.2000Renewal fee patent year 06
26.06.2001Renewal fee patent year 07
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See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition  TooltipFR29.08.2001
IT29.08.2001
DE30.11.2001
[2008/06]
Former [2006/14]FR29.08.2001
DE30.11.2001
Former [2003/21]DE30.11.2001
FR25.01.2002
Former [2003/17]DE30.11.2001
Documents cited:Search[A]EP0355069  (EVANS & SUTHERLAND COMPUTER CO [US]) [A] 1,3,5,6,9-11,13,14,17,19-21,23 * the whole document *;
 [A]US3551895  (DRISCOLL GRAHAM C JR) [A] 1,12,15,17,22 * abstract; column 2, line 44 - column 3, line 10; column 4, line 5 - column 6, line 27; column 7, lines 2-6 *;
 [A]US3577189  (COCKE JOHN, et al) [A] 1,10,11,13,17,20,23 * the whole document *;
 [A]US4200927  (HUGHES JEFFREY F [US], et al) [A] 4 * column W *;
 [A]  - CORTADELLA AND LLABERIA, "Making branches transparent to the execution unit", INTERNATIONAL JOURNAL OF MINI AND MICROCOMPUTERS, CALGARY, CALIFORNIA US, vol. 11, no. 1, pages 13 - 17, XP000210082 [A] 1,5,6,9-11,13,17,23 * the whole document *
 [A]  - PLESZKUN AND FARRENS, "An instruction cache design for use with a delayed branch", PROCEEDINGS 4TH MIT CONFERENCE : ADVANCED RESEARCH IN VLSI, CAMBRIDGE, MA,US, (19860407), pages 73 - 88, XP002155740 [A] 1,5-7,9,15,23,24 * page 74, 4th paragraph - page 75, 1st paragraph ; page 78, 4th paragraph - page 80, 1st paragraph ; page 85, 3rd paragraph ; *
 [A]  - BEEBE ET AL., "Instruction sequencing control", IBM TECHNICAL DISCLOSURE BULLETIN., NEW YORK US, vol. 14, no. 12, pages 3599 - 3611 [A] 1,5,6,10,11,13,14,17,20-23 * page 3601, lines 31-40; page 3602, lines 21-33; page 3603, lines 3-7; page 3606, line 28 - page 3607, line 43 *
 [A]  - LEE,MAHON AND MORRIS, "Pathlength reduction features in the PA-Risc architecture", COMPCON SPRING 92, SAN FRANCISCO,US, (19920224), doi:doi:10.1109/CMPCON.1992.186698, pages 129 - 135, XP000340724 [A] 27,37 * page 133, section 4.1 *

DOI:   http://dx.doi.org/10.1109/CMPCON.1992.186698
 [A]  - "Acceleration of multimedia applications using a branch conditional to previous target instruction", IBM TECHNICAL DISCLOSURE BULLETIN, ARMONK,US, vol. 37, no. 4b, pages 285 - 288 [A] 27,37 * the whole document *
by applicantEP0355069
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