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EP0666572
European procedure
Extract from the Register of European Patents
EP About this file: EP0666572
| EP0666572 - Non volatile programmable flip-flop with predefined initial state, especially for memory redundancy circuit [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 22.08.1997 Database last updated on 22.08.2024 | Most recent event Tooltip | 22.08.1997 | No opposition filed within time limit | published on 08.10.1997 [1997/41] | Applicant(s) | For all designated states STMicroelectronics S.A. 7, Avenue Galliéni 94250 Gentilly / FR | [N/P] |
| Former [1995/32] | For all designated states SGS-THOMSON MICROELECTRONICS S.A. 7, Avenue Galliéni F-94250 Gentilly / FR | Inventor(s) | 01 /
Mirabel, Jean Michel Cabinet Ballot-Schmit, 7 rue Le Sueur F-75116 Paris / FR | [1995/32] | Representative(s) | Schmit, Christian Norbert Marie, et al Cabinet Ballot-Schmit 7 Rue Le Sueur 75116 Paris / FR | [N/P] |
| Former [1995/32] | Schmit, Christian Norbert Marie, et al Cabinet Ballot-Schmit 7, rue Le Sueur F-75116 Paris / FR | Application number, filing date | 95400190.5 | 27.01.1995 | [1995/32] | Priority number, date | FR19940001034 | 31.01.1994 Original published format: FR 9401034 | [1995/32] | Filing language | FR | Procedural language | FR | Publication | Type: | A1 Application with search report | No.: | EP0666572 | Date: | 09.08.1995 | Language: | FR | [1995/32] | Type: | B1 Patent specification | No.: | EP0666572 | Date: | 16.10.1996 | Language: | FR | [1996/42] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 16.05.1995 | Classification | IPC: | G11C16/04, G11C14/00 | [1996/42] | CPC: |
G11C16/0441 (EP,US);
G11C14/00 (EP,US)
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| Former IPC [1995/32] | G11C16/04 | Designated contracting states | DE, FR, GB, IT [1995/32] | Title | German: | Nichtflüchtiger programmierbarer Flip-Flop mit vordefiniertem Anfangszustand für Speicherredundanzschaltung | [1995/32] | English: | Non volatile programmable flip-flop with predefined initial state, especially for memory redundancy circuit | [1995/32] | French: | Bascule bistable non volatile programmable, à état initial prédéfini, notamment pour circuit de redondance de mémoire | [1995/32] | Examination procedure | 26.07.1995 | Examination requested [1995/39] | 27.07.1995 | Request for accelerated examination filed | 09.10.1995 | Despatch of a communication from the examining division (Time limit: M04) | 09.10.1995 | Decision about request for accelerated examination - accepted: Yes | 16.02.1996 | Reply to a communication from the examining division | 13.03.1996 | Despatch of communication of intention to grant (Approval: Yes) | 22.04.1996 | Communication of intention to grant the patent | 25.06.1996 | Fee for grant paid | 25.06.1996 | Fee for publishing/printing paid | Opposition(s) | 17.07.1997 | No opposition filed within time limit [1997/41] |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]US4207615 (MAR JERRY [US]) [A] 1,2 * column 2, line 17 - line 56; figure 1 *; | [A]US4400799 (GUDGER KEITH H [US]) [A] 1,2 * column A *; | [A]EP0525680 (TOSHIBA KK [JP]) [A] 1-5 * column 8, line 44 - column 9, line 44; figure 4 *; | [A]EP0530376 (FUJITSU LTD [JP]) [A] 5* column 5, line 45 - column 7, line 6; figure 6 * | [A] - CIAOCA ET AL, "A million-cycle CMOS 256K EEPROM", IEEE JOURNAL OF SOLID-STATE CIRCUITS., NEW YORK US, (198710), vol. 22, no. 5, pages 684 - 692 [A] 1-3,5 * page 688, column L, line 1 - column R, line 8; figure 7 * |