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EP0717495
European procedure
Extract from the Register of European Patents
EP About this file: EP0717495
| EP0717495 - Circuit for restitution of bits transmitted in an asynchronous fashion [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 04.01.2002 Database last updated on 14.09.2024 | Most recent event Tooltip | 04.01.2002 | No opposition filed within time limit | published on 20.02.2002 [2002/08] | Applicant(s) | For all designated states STMicroelectronics S.A. 29, Boulevard Romain Rolland 92120 Montrouge / FR | [2001/51] |
| Former [1999/05] | For all designated states STMicroelectronics S.A. 7, Avenue Galliéni 94250 Gentilly / FR | ||
| Former [1996/25] | For all designated states SGS-THOMSON MICROELECTRONICS S.A. 7, Avenue Galliéni F-94250 Gentilly / FR | Inventor(s) | 01 /
Charvin, Jean-Pierre 2, Rue Albert Camus F-38320 Eybens / FR | 02 /
Stumpf, Christof c/o T.C.E.C. 5bis, Chemin de la Dhuy,"Les Jardins d'Entreprise de Maupertuis F-38240 Meylan / FR | [1996/25] | Representative(s) | de Beaumont, Michel 1bis, rue Champollion 38000 Grenoble / FR | [1996/25] | Application number, filing date | 95410141.6 | 13.12.1995 | [1996/25] | Priority number, date | FR19940015522 | 16.12.1994 Original published format: FR 9415522 | [1996/25] | Filing language | FR | Procedural language | FR | Publication | Type: | A1 Application with search report | No.: | EP0717495 | Date: | 19.06.1996 | Language: | FR | [1996/25] | Type: | B1 Patent specification | No.: | EP0717495 | Date: | 28.02.2001 | Language: | FR | [2001/09] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 20.03.1996 | Classification | IPC: | H03K5/08, H04N7/035 | [1996/25] | CPC: |
H03K5/086 (EP,US);
H04N7/035 (EP,US);
H04N7/0355 (EP,US)
| Designated contracting states | DE, FR, GB, IT [1996/25] | Title | German: | Schaltung zur Rückgewinnung von asynchron gesendeten Bits | [1996/25] | English: | Circuit for restitution of bits transmitted in an asynchronous fashion | [1996/25] | French: | Circuit de restitution de bits transmis de manière asynchrone | [1996/25] | Examination procedure | 27.11.1996 | Examination requested [1997/05] | 21.07.1998 | Despatch of a communication from the examining division (Time limit: M04) | 21.10.1998 | Reply to a communication from the examining division | 25.04.2000 | Despatch of communication of intention to grant (Approval: Yes) | 31.08.2000 | Communication of intention to grant the patent | 28.11.2000 | Fee for grant paid | 28.11.2000 | Fee for publishing/printing paid | Opposition(s) | 29.11.2001 | No opposition filed within time limit [2002/08] | Fees paid | Renewal fee | 12.12.1997 | Renewal fee patent year 03 | 11.12.1998 | Renewal fee patent year 04 | 09.12.1999 | Renewal fee patent year 05 | 13.12.2000 | Renewal fee patent year 06 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [X]US5223930 (ZATO THOMAS J [US]) [X] 1-7 * column W *; | [X]EP0531549 (MATSUSHITA ELECTRIC IND CO LTD [JP]) [X] 1-7 * the whole document *; | [A]US4418406 (OGAWA HIROSHI [JP]) [A] 1-7 * figure 6 *; | [A]US4963872 (SCHNEIDER GEORG [DE], et al) | by applicant | US5136382 |