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EP0774780
European procedure
Extract from the Register of European Patents
EP About this file: EP0774780
| EP0774780 - Manufacturing method of a microelectronic device having on a substrate a plurality of interconnect elements [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 06.06.2003 Database last updated on 11.09.2024 | Most recent event Tooltip | 23.10.2009 | Change - representative | published on 25.11.2009 [2009/48] | Applicant(s) | For all designated states COMMISSARIAT A L'ENERGIE ATOMIQUE 31-33, rue de la Fédération 75015 Paris / FR | [1997/21] | Inventor(s) | 01 /
Caillat, Patrice 10, rue de Provence 38130 Echirolles / FR | [1997/21] | Representative(s) | Poulin, Gérard, et al BREVALEX 95, rue d'Amsterdam 75378 Paris Cedex 8 / FR | [N/P] |
| Former [2009/48] | Poulin, Gérard, et al Brevalex 3, rue du Docteur Lancereaux 75008 Paris / FR | ||
| Former [2003/19] | Poulin, Gérard, et al BREVALEX 3, rue du docteur Lancereaux 75008 Paris / FR | ||
| Former [1997/21] | Dubois-Chabert, Guy, et al c/o BREVATOME 25, rue de Ponthieu 75008 Paris / FR | Application number, filing date | 96402439.2 | 14.11.1996 | [1997/21] | Priority number, date | FR19950013658 | 17.11.1995 Original published format: FR 9513658 | [1997/21] | Filing language | FR | Procedural language | FR | Publication | Type: | A1 Application with search report | No.: | EP0774780 | Date: | 21.05.1997 | Language: | FR | [1997/21] | Type: | B1 Patent specification | No.: | EP0774780 | Date: | 31.07.2002 | Language: | FR | [2002/31] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 15.01.1997 | Classification | IPC: | H01L21/66 | [1997/21] | CPC: |
H01L22/22 (EP,US)
| Designated contracting states | BE, DE, FR, GB, IT [1997/21] | Title | German: | Herstellungsmethode einer mikroelektronischen Schaltung mit vielen Verbindungselementen auf einem Substrat | [1997/21] | English: | Manufacturing method of a microelectronic device having on a substrate a plurality of interconnect elements | [1997/21] | French: | Procédé de fabrication d'un dispositif de micro-électronique comportant sur un substrat une pluralité d'éléments interconnectés | [1997/21] | Examination procedure | 25.10.1997 | Examination requested [1997/52] | 01.10.1999 | Despatch of a communication from the examining division (Time limit: M06) | 13.03.2000 | Reply to a communication from the examining division | 02.01.2001 | Despatch of a communication from the examining division (Time limit: M04) | 05.01.2001 | Reply to a communication from the examining division | 12.10.2001 | Despatch of communication of intention to grant (Approval: Yes) | 13.02.2002 | Communication of intention to grant the patent | 13.04.2002 | Fee for grant paid | 13.04.2002 | Fee for publishing/printing paid | Opposition(s) | 06.05.2003 | No opposition filed within time limit [2003/30] | Fees paid | Renewal fee | 27.11.1998 | Renewal fee patent year 03 | 26.11.1999 | Renewal fee patent year 04 | 23.11.2000 | Renewal fee patent year 05 | 20.11.2001 | Renewal fee patent year 06 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [X]US3585712 (BONCUK RICHARD J) [X] 1-3,7 * column W *; | [A]FR2558989 (VARSHNEY RAMESH [US]) [A] 1-8 * page 35, line 11 - line 31; figures 1,2 *; | [A]DE1439648 (TELEFUNKEN PATENT) [A] 1-8 * the whole document *; | [A]WO8202603 (JOHNSON ROBERT ROYCE [US]) [A] 5,8 * figure - *; | [A]EP0481703 (APTIX CORP [US]) [A] 8 * figure 4A * | by applicant | - J. TRILHE, "A 4 Mbit Static RAM", International Conference on Wafer Scale Integration, (1989), pages 193 - 200 | - R.T. SMITH ET AL., "Laser Programmable Redundancy and Yield Improvement in a 64K DRAM", IEEE JOURNAL OF SOLIC-STATE CIRCUITS, (198110), vol. SC-16, no. 5, pages 506 - 514 |