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Extract from the Register of European Patents

EP About this file: EP0844655

EP0844655 - An integrated circuit chip packaging method [Right-click to bookmark this link]
StatusThe application is deemed to be withdrawn
Status updated on  23.05.2003
Database last updated on 20.09.2024
Most recent event   Tooltip26.06.2009Change - representativepublished on 29.07.2009  [2009/31]
Applicant(s)For all designated states
Texas Instruments Incorporated
P.O. Box 655474
13500 North Central Expressway
Dallas, TX 75265 / US
[N/P]
Former [1998/22]For all designated states
TEXAS INSTRUMENTS INCORPORATED
P.O. Box 655474, 13500 Central Expressway
Dallas, TX 75265 / US
Inventor(s)01 / Zuniga, Edward R.
2804 Mimosa
Sherman, TX 75092 / US
02 / Helmick, Mary E.
817 Simon
Plano, TX 75025 / US
[1998/22]
Representative(s)Degwert, Hartmut, et al
Prinz & Partner
Rundfunkplatz 2
80335 München / DE
[N/P]
Former [2009/31]Degwert, Hartmut, et al
Prinz & Partner GbR Rundfunkplatz 2
80335 München / DE
Former [2003/12]Degwert, Hartmut, Dipl.-Phys., et al
Prinz & Partner GbR, Manzingerweg 7
81241 München / DE
Former [1998/22]Schwepfinger, Karl-Heinz, Dipl.-Ing.
Prinz & Partner, Manzingerweg 7
81241 München / DE
Application number, filing date97120464.921.11.1997
[1998/22]
Priority number, dateUS19960031776P22.11.1996         Original published format: US 31776 P
[1998/22]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0844655
Date:27.05.1998
Language:EN
[1998/22]
Type: A3 Search report 
No.:EP0844655
Date:15.12.1999
[1999/50]
Search report(s)(Supplementary) European search report - dispatched on:EP04.11.1999
ClassificationIPC:H01L21/56
[1998/22]
CPC:
H01L21/56 (EP); H01L23/50 (KR); H01L2224/32245 (EP);
H01L2224/48091 (EP); H01L2224/48247 (EP); H01L2224/48465 (EP);
H01L2224/73265 (EP); H01L24/73 (EP); H01L2924/14 (EP) (-)
C-Set:
H01L2224/48091, H01L2924/00014 (EP);
H01L2224/48465, H01L2224/48091, H01L2924/00 (EP);
H01L2224/48465, H01L2224/48091, H01L2924/00012 (EP);
H01L2224/48465, H01L2224/48247, H01L2924/00 (EP);
H01L2224/48465, H01L2224/48247, H01L2924/00012 (EP);
H01L2224/73265, H01L2224/32245, H01L2224/48247, H01L2924/00012 (EP);
H01L2924/14, H01L2924/00 (EP)
(-)
Designated contracting statesDE,   FR,   GB,   IT,   NL [2000/34]
Former [1998/22]AT,  BE,  CH,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE 
TitleGerman:Verpackungsmethode für integrierten Schaltungschip[1998/22]
English:An integrated circuit chip packaging method[1998/22]
French:Procédé d'empaquetage pour puces à circuits intégrés[1998/22]
Examination procedure13.06.2000Examination requested  [2000/32]
04.07.2001Despatch of a communication from the examining division (Time limit: M06)
14.01.2002Reply to a communication from the examining division
14.05.2002Despatch of communication of intention to grant (Approval: Yes)
16.09.2002Communication of intention to grant the patent
28.12.2002Application deemed to be withdrawn, date of legal effect  [2003/28]
03.02.2003Despatch of communication that the application is deemed to be withdrawn, reason: fee for grant / fee for printing not paid in time  [2003/28]
Fees paidRenewal fee
26.11.1999Renewal fee patent year 03
28.11.2000Renewal fee patent year 04
28.11.2001Renewal fee patent year 05
26.11.2002Renewal fee patent year 06
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Documents cited:Search[A]US5106784  (BEDNARZ GEORGE A [US]) [A] 1-16 * figure 6 *;
 [A]JPS5835946  ;
 [PA]US5622731  (FIERKENS RICHARD H J [NL]) [PA] 1-16 * figure 1 *;
 [A]JPS59145534  ;
 [A]US4003125  (WALLICK CHARLES W) [A] 1-13 * the whole document *;
 [A]JPH0654444  ;
 [A]US4132856  (HUTCHISON ROBERT V, et al) [A] 1-16 * the whole document *;
 [A]US4173821  (MAKINO KEISUKE [JP], et al) [A] 1-16 * the whole document *;
 [A]US4592131  (DEIE TOSHIKAZU [JP]) [A] 1-16 * the whole document *;
 [A]EP0114474  (WESTERN ELECTRIC CO [US]) [A] 1-16 * the whole document *;
 [A]JPS58204543
 [A]  - PATENT ABSTRACTS OF JAPAN, (19830519), vol. 007, no. 115, Database accession no. (E - 176), & JP58035946 A 19830302 (FUJITSU KK) [A] 1-16 * abstract *
 [A]  - PATENT ABSTRACTS OF JAPAN, (19841218), vol. 008, no. 277, Database accession no. (E - 285), & JP59145534 A 19840821 (MATSUSHITA DENKI SANGYO KK) [A] 1-16 * abstract *
 [A]  - PATENT ABSTRACTS OF JAPAN, (19940531), vol. 018, no. 286, Database accession no. (E - 1556), & JP06054444 A 19940225 (TOSHIBA CORP) [A] 1-16 * abstract *
 [A]  - PATENT ABSTRACTS OF JAPAN, (19840306), vol. 008, no. 049, Database accession no. (E - 230), & JP58204543 A 19831129 (KAZUO BANDOU) [A] 1-16 * abstract *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.