EP0817069 - Methods and apparatus for a coherence transformer with limited memory for connecting computer system coherence domains [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 05.03.2004 Database last updated on 20.09.2024 | Most recent event Tooltip | 11.01.2008 | Lapse of the patent in a contracting state New state(s): IT | published on 13.02.2008 [2008/07] | Applicant(s) | For all designated states SUN MICROSYSTEMS, INC. 4150 Network Circle Santa Clara, California 95054 / US | [N/P] |
Former [2003/17] | For all designated states Sun Microsystems, Inc. 4150 Network Circle Santa Clara, California 95054 / US | ||
Former [1998/02] | For all designated states SUN MICROSYSTEMS, INC. 2550 Garcia Avenue Mountain View, California 94043-1100 / US | Inventor(s) | 01 /
Hagersten, Erik E 3451 Cork Oak Way Palo Alto CA 94043 / US | 02 /
Hill, Mark Donald 2124 Chamberlain Avenue Madison WI 53705 / US | 03 /
Wood, David A 2115 Bascon Street Madison WI 53705 / US | [2003/33] |
Former [1998/02] | 01 /
Hagerstein, Erik E 3451 Cork Oak Way Palo Alto CA 94043 / US | ||
02 /
Hill, Mark Donald 2124 Chamberlain Avenue Madison WI 53705 / US | |||
03 /
Wood, David A 2115 Bascon Street Madison WI 53705 / US | Representative(s) | Turner, James Arthur, et al D Young & Co LLP 120 Holborn London EC1N 2DY / GB | [N/P] |
Former [1998/02] | Turner, James Arthur, et al D. Young & Co., 21 New Fetter Lane London EC4A 1DA / GB | Application number, filing date | 97304526.3 | 25.06.1997 | [1998/02] | Priority number, date | US19960677014 | 01.07.1996 Original published format: US 677014 | [1998/02] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP0817069 | Date: | 07.01.1998 | Language: | EN | [1998/02] | Type: | B1 Patent specification | No.: | EP0817069 | Date: | 02.05.2003 | Language: | EN | [2003/18] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 05.11.1997 | Classification | IPC: | G06F12/08 | [1998/02] | CPC: |
G06F12/0813 (EP,US);
G06F12/082 (EP,US);
G06F12/0826 (EP,US);
G06F12/0831 (EP,US);
G06F2212/622 (EP,US)
| Designated contracting states | DE, FR, GB, IT, NL, SE [1998/38] |
Former [1998/02] | AT, BE, CH, DE, DK, ES, FI, FR, GB, GR, IE, IT, LI, LU, MC, NL, PT, SE | Title | German: | Verfahren und Vorrichtung für einen Kohärenzumwandler mit begrenztem Speicher zur Verbindung von Rechnersystem-Kohärenzdomänen | [1998/02] | English: | Methods and apparatus for a coherence transformer with limited memory for connecting computer system coherence domains | [1998/02] | French: | Procédé et dispositif pour transformateur de cohérence avec mémoire limitée permettant la connexion des domaines de cohérence de système d'ordinateur | [1998/02] | Examination procedure | 20.05.1998 | Examination requested [1998/30] | 27.11.2000 | Despatch of a communication from the examining division (Time limit: M06) | 29.05.2001 | Reply to a communication from the examining division | 15.07.2002 | Communication of intention to grant the patent | 18.12.2002 | Fee for grant paid | 18.12.2002 | Fee for publishing/printing paid | Opposition(s) | 03.02.2004 | No opposition filed within time limit [2004/17] | Fees paid | Renewal fee | 26.04.1999 | Renewal fee patent year 03 | 05.06.2000 | Renewal fee patent year 04 | 05.06.2001 | Renewal fee patent year 05 | 26.06.2002 | Renewal fee patent year 06 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | IT | 02.05.2003 | NL | 02.05.2003 | SE | 02.08.2003 | [2008/07] |
Former [2004/02] | NL | 02.05.2003 | |
SE | 02.08.2003 | ||
Former [2003/50] | SE | 02.08.2003 | Documents cited: | Search | [A]US5522058 (IWASA SHIGEAKI [JP], et al) [A] 1-20 * column 33, line 31 - column 35, line 20; figures 3-5 * | [A] - LOVETT T ET AL, "STING: A CC-NUMA COMPUTER SYSTEM FOR THE COMMERCIAL MARKETPLACE", COMPUTER ARCHITECTURE NEWS, (199605), vol. 24, no. 2, pages 308 - 317, XP000592195 [A] 1-20 * page 309, paragraph 2.2 - page 311, column R, line 6 * DOI: http://dx.doi.org/10.1145/232974.233006 | [A] - LENOSKI D ET AL, "THE STANFORD DASH MULTIPROCESSOR", COMPUTER, (199203), vol. 25, no. 3, pages 63 - 79, XP000288291 [A] 1-20 * page 67, column M, line 1 - page 69, column M, line 45 * * page 72, column R, line 9 - page 74, column R, line 7 * DOI: http://dx.doi.org/10.1109/2.121510 | [A] - O'KRAFKA B W ET AL, "AN EMPIRICAL EVALUATION OF TWO MEMORY-EFFICIENT DIRECTORY METHODS", PROCEEDINGS OF THE ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE, SEATTLE, MAY 28 - 31, 1990, INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, no. SYMP. 17, pages 138 - 147, XP000144792 [A] 1-20 * page 140, paragraph 3.4 - page 141, column L, line 21 * DOI: http://dx.doi.org/10.1109/ISCA.1990.134519 |