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EP0821503
European procedure
Extract from the Register of European Patents
EP About this file: EP0821503
| EP0821503 - Clock timing recovery circuit [Right-click to bookmark this link] | |||
| Former [1998/05] | Clock timing recovery methods and circuits | ||
| [2006/31] | Status | No opposition filed within time limit Status updated on 09.11.2007 Database last updated on 19.07.2024 | Most recent event Tooltip | 09.11.2007 | No opposition filed within time limit | published on 12.12.2007 [2007/50] | Applicant(s) | For all designated states NIPPON TELEGRAPH AND TELEPHONE CORPORATION 19-2 Nishi-Shinjuku 3-chome Shinjuku-ku Tokyo 163-19 / JP | [2007/01] |
| Former [1998/05] | For all designated states NIPPON TELEGRAPH AND TELEPHONE CORPORATION 19-2 Nishi-Shinjuku 3-chome Shinjuku-ku, Tokyo 163-19 / JP | Inventor(s) | 01 /
Takao, Toshiaki 4-22-1-B308 Kamariyahigashi, Kanazawa-ku Yokohama-shi, Kanagawa 236 / JP | 02 /
Suzuki, Yoshifumi 2-1-3-1-305 Hayashi Yokosuka-shi, Kanagawa 238-03 / JP | 03 /
Shirato, Tadashi 3-15-3 Umezono Kiyose-shi, Tokyo 204 / JP | [1998/05] | Representative(s) | Skone James, Robert Edmund Gill Jennings & Every LLP The Broadgate Tower 20 Primrose Street London EC2A 2ES / GB | [N/P] |
| Former [1998/05] | Skone James, Robert Edmund GILL JENNINGS & EVERY Broadgate House 7 Eldon Street London EC2M 7LH / GB | Application number, filing date | 97305040.4 | 09.07.1997 | [1998/05] | Priority number, date | JP19960192293 | 22.07.1996 Original published format: JP 19229396 | JP19970025429 | 07.02.1997 Original published format: JP 2542997 | JP19970106261 | 23.04.1997 Original published format: JP 10626197 | [1998/05] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0821503 | Date: | 28.01.1998 | Language: | EN | [1998/05] | Type: | A3 Search report | No.: | EP0821503 | Date: | 24.11.1999 | [1999/47] | Type: | B1 Patent specification | No.: | EP0821503 | Date: | 03.01.2007 | Language: | EN | [2007/01] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 08.10.1999 | Classification | IPC: | H04L7/02, H04L7/033 | [1998/05] | CPC: |
H04L7/0054 (EP,US);
H04L7/0062 (EP,US);
H04L7/0334 (EP,US);
H04L7/046 (EP,US);
H04L2007/047 (EP,US);
H04L7/0337 (EP,US)
| Designated contracting states | DE, FR, GB, IT [2000/31] |
| Former [1998/05] | AT, BE, CH, DE, DK, ES, FI, FR, GB, GR, IE, IT, LI, LU, MC, NL, PT, SE | Title | German: | Schaltung zur Taktrückgewinnung | [2006/31] | English: | Clock timing recovery circuit | [2006/31] | French: | Circuit de récupération d'horloge | [2006/31] |
| Former [1998/05] | Verfahren und Schaltungen zur Taktrückgewinnung | ||
| Former [1998/05] | Clock timing recovery methods and circuits | ||
| Former [1998/05] | Procédé et circuit de récupération d'horloge | Examination procedure | 08.05.2000 | Examination requested [2000/27] | 16.02.2005 | Despatch of a communication from the examining division (Time limit: M04) | 22.06.2005 | Reply to a communication from the examining division | 12.09.2005 | Despatch of a communication from the examining division (Time limit: M06) | 16.03.2006 | Reply to a communication from the examining division | 28.07.2006 | Communication of intention to grant the patent | 17.11.2006 | Fee for grant paid | 17.11.2006 | Fee for publishing/printing paid | Divisional application(s) | EP06002711.7 / EP1657846 | Opposition(s) | 05.10.2007 | No opposition filed within time limit [2007/50] | Fees paid | Renewal fee | 13.07.1999 | Renewal fee patent year 03 | 12.07.2000 | Renewal fee patent year 04 | 12.07.2001 | Renewal fee patent year 05 | 12.07.2002 | Renewal fee patent year 06 | 14.07.2003 | Renewal fee patent year 07 | 14.07.2004 | Renewal fee patent year 08 | 13.07.2005 | Renewal fee patent year 09 | 12.07.2006 | Renewal fee patent year 10 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]US4541009 (ROUGEOLLE DANIEL [FR], et al) [A] 1,2,24 * column 1, line 66 - column 2, line 54 * * column 3, line 25 - line 34 * * column 3, line 61 - column 5, line 9 *; | [A]WO9119371 (NORTHERN TELECOM LTD [CA]) [A] 1,2,24 * page 5, line 16 - page 6, line 14 * * page 6, line 28 - page 7, line 9 * * page 9, line 21 - page 10, line 11 * * figures 1,2A-2G *; | [A]DE4414364 (SIEMENS AG [DE]) [A] 1,2,24 * column 2, line 10 - column 3, line 3 * * column 5, line 5 - line 24 * * figures 1-3 *; | [A]EP0241974 (PHILIPS NV [NL]) [A] 1,2,24 * figures 1,2; claim 1 * * page 3, line 40 - page 4, line 24 * * page 5, line 19 - line 29 *; | [A]EP0389027 (SITS SOC IT TELECOM SIEMENS [IT]) [A] 3,5,7,13,17,19,21,23,25-28 * page 3, line 17 - line 29 * * page 5, line 22 - page 6, line 7; figure 1 *; | [A]WO9522861 (NOKIA TELECOMMUNICATIONS OY [FI], et al) [A] 7,13,17,19,21,23,25-28 * page 6, line 1 - line 20 * * page 7, line 5 - line 17; figures 3,4,6 *; | [A]WO9513675 (PACIFIC COMM SCIENCES INC [US]) [A] 4,6,9,13,20-23,25-28 * page 12, paragraph 3 - page 13, paragraph 2 * * page 14, paragraph 1 * * page 15, paragraph L - page 16, paragraph 3 *; | [A]EP0413108 (NEC CORP [JP]) [A] 4,6,13,20-23,25-28 * column 10, line 4 - column 11, line 42 * * column 13, line 10 - line 37; figures 6,7 * | [A] - "FAST SYNCHRONIZATION WITH BURST-MODE DIGITAL SIGNALS", NTIS TECH NOTES, SPRINGFIELD, VA, US, (198811), page 936, XP000003885 [A] 1,2,24 * column W * | [A] - LEE L -N ET AL, "DIGITAL SIGNAL PROCESSOR-BASED PROGRAMMABLE BPSK/QPSK/OFFSET-QPSK MODEMS", COMSAT TECHNICAL REVIEW, (19890921), vol. 19, no. 2, pages 195 - 234, XP000110500 [A] 1,2,24 * page 221, paragraph 2 - page 222, line L; figure 17 * |