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EP0841696
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EP About this file: EP0841696
| EP0841696 - Method to encapsulate connection wires for semiconductor power wafers [Right-click to bookmark this link] | Status | The application has been withdrawn Status updated on 14.12.2001 Database last updated on 05.10.2024 | Most recent event Tooltip | 14.12.2001 | Withdrawal of application | published on 30.01.2002 [2002/05] | Applicant(s) | For all designated states GEC ALSTHOM TRANSPORT SA 38, Avenue Kléber 75116 Paris / FR | [1998/20] | Inventor(s) | 01 /
Chave, Jacques 56 Rue Jeanne d'Arc 69003 Lyon / FR | [1998/20] | Representative(s) | Gosse, Michel, et al ALSTOM Technologies C.I.P.D. 23/25 Avenue Morane-Saulnier 92360 Meudon La Foret / FR | [N/P] |
| Former [1998/47] | Gosse, Michel, et al ALSTOM FRANCE SA Département de Propriété Industrielle, 38, avenue Kléber 75116 Paris / FR | ||
| Former [1998/20] | Gosse, Michel, et al c/o Alcatel Alsthom Recherche DPI, 30, avenue Kléber 75016 Paris / FR | Application number, filing date | 97402580.1 | 30.10.1997 | [1998/20] | Priority number, date | FR19960013593 | 07.11.1996 Original published format: FR 9613593 | [1998/20] | Filing language | FR | Procedural language | FR | Publication | Type: | A1 Application with search report | No.: | EP0841696 | Date: | 13.05.1998 | Language: | FR | [1998/20] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 08.01.1998 | Classification | IPC: | H01L23/49, H01L21/56 | [1998/20] | CPC: |
H01L23/293 (EP);
H01L23/10 (KR);
H01L24/85 (EP);
H01L25/07 (EP);
H01L2224/45124 (EP);
H01L2224/48151 (EP);
H01L2224/4851 (EP);
H01L2224/48699 (EP);
H01L2224/85205 (EP);
H01L2224/8592 (EP);
H01L2224/85948 (EP);
H01L24/45 (EP);
H01L24/48 (EP);
H01L2924/01006 (EP);
H01L2924/01013 (EP);
| C-Set: |
H01L2224/45124, H01L2924/00014 (EP);
H01L2224/85205, H01L2224/45124, H01L2924/00 (EP);
H01L2224/85205, H01L2924/00014 (EP)
| Designated contracting states | CH, DE, FR, GB, IT, LI [1999/04] |
| Former [1998/20] | AT, BE, CH, DE, DK, ES, FI, FR, GB, GR, IE, IT, LI, LU, MC, NL, PT, SE | Title | German: | Verfahren zum Packen von Verbindungsdrähten für Leitungshalbleiterplatten | [1998/20] | English: | Method to encapsulate connection wires for semiconductor power wafers | [1998/20] | French: | Procédé d'enrobage de fils de connexion de pastilles à semi-conducteurs de puissance | [1998/20] | Examination procedure | 21.10.1998 | Examination requested [1998/51] | 10.08.2001 | Despatch of a communication from the examining division (Time limit: M04) | 06.12.2001 | Application withdrawn by applicant [2002/05] | Fees paid | Renewal fee | 14.09.1999 | Renewal fee patent year 03 | 15.09.2000 | Renewal fee patent year 04 | 20.09.2001 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [X]JPS62108555 ; | [XA]EP0601323 (IBM [US]) [X] 1,2 * column 2, line 49 - line 52; figure 2 * [A] 4-7; | [XA]WO9503624 (NAT SEMICONDUCTOR CORP [US]) [X] 1 * page 5, line 7 - line 13; claims 1,2 * [A] 3,5,6; | [XA]EP0416133 (NIPPON STEEL CORP [JP]) [X] 1 * claim 1 * [A] 5,6 | [X] - PATENT ABSTRACTS OF JAPAN, (19871013), vol. 011, no. 314, Database accession no. (E - 549), & JP62108555 A 19870519 (HITACHI LTD) [X] 1-7 * abstract * |