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Extract from the Register of European Patents

EP About this file: EP0865081

EP0865081 - Process for fabricating electronic elements [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  18.01.2008
Database last updated on 18.01.2025
Most recent event   Tooltip18.01.2008No opposition filed within time limitpublished on 20.02.2008  [2008/08]
Applicant(s)For all designated states
Micronas GmbH
Hans-Bunte-Strasse 19
79108 Freiburg i. Br. / DE
[2007/11]
Former [2000/27]For all designated states
Micronas GmbH
Hans-Bunte-Strasse 19
79108 Freiburg / DE
Former [1998/38]For all designated states
Micronas Intermetall GmbH
Hans-Bunte-Strasse 19
79108 Freiburg / DE
Inventor(s)01 / Igel, Günter, Dipl.-Ing.
Scharnhorst-Strasse 32
79331 Teningen / DE
02 / Mall, Martin, Dr. Dipl.-Phys.
Kronenstrasse 5
79100 Freiburg / DE
[1998/38]
Representative(s)Göhring, Robert
Westphal - Mussgnug & Partner
Patentanwälte
Am Riettor 5
78048 Villingen-Schwenningen / DE
[N/P]
Former [2006/24]Göhring, Robert
Westphal - Mussgnug & Partner Patentanwälte Am Riettor 5
78048 Villingen-Schwenningen / DE
Former [1998/38]Hornig, Leonore, Dr.
MICRONAS INTERMETALL GmbH, Patentabteilung, Hans-Bunte-Strasse 19
79108 Freiburg / DE
Application number, filing date98102580.214.02.1998
[1998/38]
Priority number, dateDE199710788727.02.1997         Original published format: DE 19707887
[1998/38]
Filing languageDE
Procedural languageDE
PublicationType: A2 Application without search report 
No.:EP0865081
Date:16.09.1998
Language:DE
[1998/38]
Type: A3 Search report 
No.:EP0865081
Date:08.08.2001
[2001/32]
Type: B1 Patent specification 
No.:EP0865081
Date:14.03.2007
Language:DE
[2007/11]
Search report(s)(Supplementary) European search report - dispatched on:EP26.06.2001
ClassificationIPC:H01L21/60, H01L21/304, H01L23/485
[2001/32]
CPC:
H01L24/13 (EP,US); H01L24/11 (EP,US); H01L2224/13099 (EP,US);
H01L2924/0001 (EP,US); H01L2924/01033 (EP,US); H01L2924/01078 (EP,US);
H01L2924/01082 (EP,US); H01L2924/014 (EP,US); H01L2924/12042 (EP,US) (-)
C-Set:
H01L2924/0001, H01L2224/13099 (EP,US);
H01L2924/12042, H01L2924/00 (US,EP)
Former IPC [1998/38]H01L21/60
Designated contracting statesCH,   DE,   FR,   GB,   IT,   LI,   NL [2002/18]
Former [1998/38]AT,  BE,  CH,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE 
TitleGerman:Verfahren zum Herstellen von elektronischen Elementen[1998/38]
English:Process for fabricating electronic elements[1998/38]
French:Procédé de fabrication d'éléments électroniques[1998/38]
Examination procedure08.02.2002Examination requested  [2002/16]
28.03.2006Despatch of a communication from the examining division (Time limit: M06)
22.09.2006Reply to a communication from the examining division
20.11.2006Communication of intention to grant the patent
27.01.2007Fee for grant paid
27.01.2007Fee for publishing/printing paid
Opposition(s)17.12.2007No opposition filed within time limit [2008/08]
Fees paidRenewal fee
29.02.2000Renewal fee patent year 03
28.02.2001Renewal fee patent year 04
28.02.2002Renewal fee patent year 05
28.02.2003Renewal fee patent year 06
01.03.2004Renewal fee patent year 07
28.02.2005Renewal fee patent year 08
27.02.2006Renewal fee patent year 09
27.02.2007Renewal fee patent year 10
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Documents cited:Search[DA]US3639811  (SCHROEDER JON M) [DA] 1-17* abstract *;
 [Y]US3747202  (JORDAN J) [Y] 1-17 * abstract *;
 [A]US4503597  (KUSHIMA TADAO [JP], et al) [A] 1-17 * abstract *;
 [Y]WO9015438  (UNISTRUCTURE INC [US]) [Y] 1-17 * abstract *;
 [A]EP0573724  (IBM [US]) [A] 1-17 * abstract *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.