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Extract from the Register of European Patents

EP About this file: EP0862061

EP0862061 - Circuit board inspection apparatus and method [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  21.11.2003
Database last updated on 20.12.2024
Most recent event   Tooltip21.11.2003No opposition filed within time limitpublished on 07.01.2004  [2004/02]
Applicant(s)For all designated states
Nidec-Read Corporation
126, Megawa, Makishima-cho Uji-city
Kyoto 611-0041 / JP
[N/P]
Former [1998/36]For all designated states
Nidec-Read Corporation
126, Megawa, Makishima-cho
Uji-city, Kyoto 611-0041 / JP
Inventor(s)01 / Yamashita, Munehiro
126, Megawa, Makishima-cho
Uji-city, Kyoto 611-0041 / JP
[1998/36]
Representative(s)von Fischern, Bernhard, et al
Hoffmann - Eitle
Patent- und Rechtsanwälte
Arabellastrasse 4
81925 München / DE
[N/P]
Former [1998/36]von Fischern, Bernhard, Dipl.-Ing., et al
Hoffmann - Eitle, Patent- und Rechtsanwälte, Arabellastrasse 4
81925 München / DE
Application number, filing date98103453.127.02.1998
[1998/36]
Priority number, dateJP1997004612728.02.1997         Original published format: JP 4612797
[1998/36]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0862061
Date:02.09.1998
Language:EN
[1998/36]
Type: A3 Search report 
No.:EP0862061
Date:02.02.2000
[2000/05]
Type: B1 Patent specification 
No.:EP0862061
Date:15.01.2003
Language:EN
[2003/03]
Search report(s)(Supplementary) European search report - dispatched on:EP17.12.1999
ClassificationIPC:G01R31/312, G01R31/28
[2000/05]
CPC:
G01R31/2805 (EP,US); G01R31/2812 (EP,US); G01R31/312 (EP,US);
H05K1/0266 (EP,US); H05K1/11 (EP,US)
Former IPC [1998/36]G01R31/28
Designated contracting statesDE,   FR,   GB [2000/41]
Former [1998/36]AT,  BE,  CH,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE 
TitleGerman:Verfahren und Vorrichtung zum Prüfen von Leiterplatten[1998/36]
English:Circuit board inspection apparatus and method[1998/36]
French:Procédé et dispositif de contrôle de cartes de circuit[1998/36]
Examination procedure17.07.2000Examination requested  [2000/37]
03.08.2000Loss of particular rights, legal effect: designated state(s)
15.11.2000Despatch of communication of loss of particular rights: designated state(s) AT, BE, CH, DK, ES, FI, GR, IE, IT, LI, LU, MC, NL, PT, SE
21.06.2001Request for accelerated examination filed
10.08.2001Despatch of a communication from the examining division (Time limit: M04)
10.08.2001Decision about request for accelerated examination - accepted: Yes
14.12.2001Reply to a communication from the examining division
17.01.2002Despatch of a communication from the examining division (Time limit: M04)
17.05.2002Reply to a communication from the examining division
12.07.2002Communication of intention to grant the patent
12.11.2002Fee for grant paid
12.11.2002Fee for publishing/printing paid
Opposition(s)16.10.2003No opposition filed within time limit [2004/02]
Fees paidRenewal fee
16.02.2000Renewal fee patent year 03
16.02.2001Renewal fee patent year 04
26.02.2002Renewal fee patent year 05
Penalty fee
Penalty fee Rule 85a EPC 1973
01.09.2000AT   M01   Not yet paid
01.09.2000BE   M01   Not yet paid
01.09.2000CH   M01   Not yet paid
01.09.2000DK   M01   Not yet paid
01.09.2000ES   M01   Not yet paid
01.09.2000FI   M01   Not yet paid
01.09.2000GR   M01   Not yet paid
01.09.2000IE   M01   Not yet paid
01.09.2000IT   M01   Not yet paid
01.09.2000LU   M01   Not yet paid
01.09.2000MC   M01   Not yet paid
01.09.2000NL   M01   Not yet paid
01.09.2000PT   M01   Not yet paid
01.09.2000SE   M01   Not yet paid
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Documents cited:Search[X]EP0551564  (HEWLETT PACKARD CO [US]) [X] 1-12 * abstract * * column 18, line 35 - column 19, line 36 *;
 [A]EP0572060  (IBM [US]) [A] 1-13* abstract *;
 [A]EP0633478  (SPEA SRL [IT]) [A] 1-13 * abstract *;
 [A]EP0636887  (GENRAD INC [US]) [A] 1-13 * abstract * * column 4, line 22 - column 5, line 52 *;
 [X]DE4417580  (HEWLETT PACKARD CO [US]) [X] 1-12 * abstract * * column 8, line 49 - line 60 *;
 [X]JPH0854448  (OKANO HIGHTECH KK) [X] 1-13 * figures 2,3 *;
 [L]US5747999  (YAMAOKA SYUUZI [JP]) [L] * abstract * * column 2, line 14 - line 60 * * column 4, line 13 - line 59 *
ExaminationJPH03154879
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.