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EP0865160
European procedure
Extract from the Register of European Patents
EP About this file: EP0865160
| EP0865160 - Interpolating circuit [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 30.05.2003 Database last updated on 03.09.2024 | Most recent event Tooltip | 30.05.2003 | No opposition filed within time limit | published on 16.07.2003 [2003/29] | Applicant(s) | For all designated states NEC Corporation 7-1, Shiba 5-chome Minato-ku Tokyo 108-8001 / JP | [N/P] |
| Former [2002/30] | For all designated states NEC CORPORATION 7-1, Shiba 5-chome, Minato-ku Tokyo / JP | ||
| Former [1998/38] | For all designated states NEC CORPORATION 7-1, Shiba 5-chome Minato-ku Tokyo / JP | Inventor(s) | 01 /
Takanori, Saeki NEC Corporation, 7-1, Shiba 5-chome Minato-ku, Tokyo / JP | [1998/38] | Representative(s) | Glawe, Delfs, Moll Partnerschaft mbB von Patent- und Rechtsanwälten Postfach 26 01 62 80058 München / DE | [N/P] |
| Former [1998/38] | Glawe, Delfs, Moll & Partner Patentanwälte Postfach 26 01 62 80058 München / DE | Application number, filing date | 98104497.7 | 12.03.1998 | [1998/38] | Priority number, date | JP19970058749 | 13.03.1997 Original published format: JP 5874997 | [1998/38] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0865160 | Date: | 16.09.1998 | Language: | EN | [1998/38] | Type: | A3 Search report | No.: | EP0865160 | Date: | 22.11.2000 | [2000/47] | Type: | B1 Patent specification | No.: | EP0865160 | Date: | 24.07.2002 | Language: | EN | [2002/30] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 10.10.2000 | Classification | IPC: | H03K5/13 | [1998/38] | CPC: |
H03K5/133 (EP,KR,US);
H03K5/135 (KR)
| Designated contracting states | DE, FR, GB [2001/32] |
| Former [1998/38] | AT, BE, CH, DE, DK, ES, FI, FR, GB, GR, IE, IT, LI, LU, MC, NL, PT, SE | Title | German: | Interpolationsschaltung | [1998/38] | English: | Interpolating circuit | [1998/38] | French: | Circuit d'interpolation | [1998/38] | Examination procedure | 11.10.2000 | Examination requested [2000/49] | 11.09.2001 | Despatch of communication of intention to grant (Approval: Yes) | 18.01.2002 | Communication of intention to grant the patent | 26.04.2002 | Fee for grant paid | 26.04.2002 | Fee for publishing/printing paid | Opposition(s) | 25.04.2003 | No opposition filed within time limit [2003/29] | Fees paid | Renewal fee | 20.03.2000 | Renewal fee patent year 03 | 16.03.2001 | Renewal fee patent year 04 | 21.03.2002 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]JPH07131335 ; | [A]JPH04156008 ; | [A]EP0101896 (TOKYO SHIBAURA ELECTRIC CO [JP]) [A] 1 * the whole document *; | [A]US4507574 (SEKI TERUO [JP], et al) [A] 1 * abstract *; | [A]EP0720291 (NEC CORP [JP]) | [A] - PATENT ABSTRACTS OF JAPAN, (19950929), vol. 1995, no. 08, & JP07131335 A 19950519 (OLYMPUS OPTICAL CO LTD) [A] 1 * abstract * | [A] - PATENT ABSTRACTS OF JAPAN, (19920916), vol. 016, no. 444, Database accession no. (E - 1265), & JP04156008 A 19920528 (HITACHI LTD) [A] 1 * abstract * |