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Extract from the Register of European Patents

EP About this file: EP0909035

EP0909035 - Phase synchronisation device and phase quadrature signal generating apparatus [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  22.08.2008
Database last updated on 24.08.2024
Most recent event   Tooltip06.03.2009Lapse of the patent in a contracting state
New state(s): FI
published on 08.04.2009  [2009/15]
Applicant(s)For all designated states
TEXAS INSTRUMENTS LIMITED
800 Pavilion Drive Northampton Business Park
Northampton NN4 7YL / GB
[2007/42]
Former [2004/14]For all designated states
Texas Instruments Limited
800 Pavilion Drive
Northampton Business Park, Northampton NN4 7YL / GB
Former [1999/15]For all designated states
Phoenix VLSI Consultants Ltd.
Towcester Mill
Towcester, Northamptonshire NN12 6AD / GB
Inventor(s)01 / Pickering, Andrew James
31 Shenstone Avenue
Rugby, Warwickshire CV22 5BJ / GB
02 / Joy, Andrew Keith
15 Wymersley Close
Great Houghton NN4 7PT / GB
03 / Simpson, Susan Mary
15 Clare Crescent
Towcester NN12 6QQ / GB
[1999/15]
Representative(s)Holt, Michael, et al
Texas Instruments Limited
European Patent Department
3rd Floor
401 Grafton Gate
Milton Keynes MK9 1AQ / GB
[N/P]
Former [2008/33]Holt, Michael, et al
Texas Instruments Limited European Patents Department 800 Pavilion Drive
Northampton NN4 7YL / GB
Former [2004/14]Holt, Michael, et al
Texas Instruments Ltd., 800 Pavilion Drive, Northampton Business Park
Northampton, Northamptonshire NN4 7YL / GB
Former [1999/15]Crawford, Andrew Birkby, et al
A.A. THORNTON & CO. Northumberland House 303-306 High Holborn
London WC1V 7LE / GB
Application number, filing date98308210.808.10.1998
[1999/15]
Priority number, dateGB1997002138408.10.1997         Original published format: GB 9721384
[1999/15]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0909035
Date:14.04.1999
Language:EN
[1999/15]
Type: A3 Search report 
No.:EP0909035
Date:06.09.2000
[2000/36]
Type: B1 Patent specification 
No.:EP0909035
Date:17.10.2007
Language:EN
[2007/42]
Search report(s)(Supplementary) European search report - dispatched on:EP20.07.2000
ClassificationIPC:H03L7/08, H03L7/081, H03H11/22
[2000/36]
CPC:
H03B28/00 (EP,US); H03L7/093 (EP,US); H03L7/0998 (EP);
H04L7/033 (EP,US); H04L7/0025 (EP,US)
Former IPC [1999/15]H03L7/08
Designated contracting statesDE,   FI,   FR,   GB,   IT,   NL,   SE [2001/21]
Former [1999/15]AT,  BE,  CH,  CY,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE 
TitleGerman:Phasensynchronisierungseinrichtung und Vorrichtung zum Erzeugen von in Quadraturphasenbeziehung stehenden Signalen[1999/15]
English:Phase synchronisation device and phase quadrature signal generating apparatus[1999/15]
French:Dispositif de synchronisation de phase et générateur de signaux en quadrature de phase[1999/15]
Examination procedure22.01.2001Examination requested  [2001/12]
07.03.2001Loss of particular rights, legal effect: designated state(s)
20.09.2001Despatch of communication of loss of particular rights: designated state(s) AT, BE, CH, CY, DK, ES, GR, IE, LU, MC, PT
17.10.2003Despatch of a communication from the examining division (Time limit: M06)
12.08.2004Reply to a communication from the examining division
18.05.2006Despatch of a communication from the examining division (Time limit: M04)
07.11.2006Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time
17.01.2007Reply to a communication from the examining division
13.04.2007Communication of intention to grant the patent
23.08.2007Fee for grant paid
23.08.2007Fee for publishing/printing paid
Opposition(s)18.07.2008No opposition filed within time limit [2008/39]
Request for further processing for:17.01.2007Request for further processing filed
17.01.2007Full payment received (date of receipt of payment)
Request granted
02.03.2007Decision despatched
07.01.2007Request for further processing filed
17.01.2007Full payment received (date of receipt of payment)
Request granted
02.03.2007Decision despatched
17.01.2007Request for further processing filed
17.01.2007Full payment received (date of receipt of payment)
Request granted
02.03.2007Decision despatched
Fees paidRenewal fee
22.01.2001Renewal fee patent year 03
11.10.2001Renewal fee patent year 04
17.12.2002Renewal fee patent year 05
31.10.2003Renewal fee patent year 06
02.11.2004Renewal fee patent year 07
31.10.2005Renewal fee patent year 08
31.10.2006Renewal fee patent year 09
31.10.2007Renewal fee patent year 10
Penalty fee
Penalty fee Rule 85a EPC 1973
26.06.2001AT   M01   Not yet paid
26.06.2001BE   M01   Not yet paid
26.06.2001CH   M01   Not yet paid
26.06.2001CY   M01   Not yet paid
26.06.2001DK   M01   Not yet paid
26.06.2001ES   M01   Not yet paid
26.06.2001GR   M01   Not yet paid
26.06.2001IE   M01   Not yet paid
26.06.2001LU   M01   Not yet paid
26.06.2001MC   M01   Not yet paid
26.06.2001PT   M01   Not yet paid
Additional fee for renewal fee
31.10.200003   M06   Fee paid on   22.01.2001
31.10.200205   M06   Fee paid on   17.12.2002
Opt-out from the exclusive  Tooltip
competence of the Unified
Patent Court
See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition  TooltipFI17.10.2007
NL17.10.2007
SE17.01.2008
[2009/15]
Former [2008/23]NL17.10.2007
SE17.01.2008
Documents cited:Search[XY]EP0432895  (STC PLC [GB]) [X] 12-16,18 * column 1, line 36 - column 2, line 17; figure . * [Y] 17;
 [XY]EP0707379  (BELL TELEPHONE MFG [BE]) [X] 12-14,16,18 * column 5, line 6 - column 8, line 44; figures 1-3 *[Y] 17;
 [XY]US5526380  (IZZARD MARTIN J [US]) [X] 1-3,6 * column 4, line 55 - column 8, line 65; figures 2-12 * [Y] 17;
 [X]  - IZZARD M J ET AL, "ANALOG VERSUS DIGITAL CONTROL OF A CLOCK SYNCHRONIZER FOR 3GB/S DATA WITH 3.0V DIFFERENTIAL ECL", SYMPOSIUM ON VLSI CIRCUITS,US,NEW YORK, IEEE, (1994), ISBN 0-7803-1919-2, pages 39 - 40, XP000501015 [X] 1-3,6 * the whole document *
 [L]  - SCHMIDT L ET AL, "CONTINUOUSLY VARIABLE GIGAHERTZ PHASE-SHIFTER IC COVERING MORE THAN ONE FREQUENCY DECADE", IEEE JOURNAL OF SOLID-STATE CIRCUITS,US,IEEE INC. NEW YORK, (19920601), vol. 27, no. 6, ISSN 0018-9200, pages 854 - 862, XP000306386 [L] * Reference is made to this article in both US-A-5526380 and the article from Izzard et al. *

DOI:   http://dx.doi.org/10.1109/4.135329
 [X]  - LEE T H ET AL, "ISSCC94/SESSION 18/HIGH-PERFORMANCE LOGIC AND CIRCUIT TECHNIQUES/ PAPER FA 18.6. A 2.5V DELAY-LOCKED LOOP FOR AN 18MB 500MB/S DRAM", IEEE INTERNATIONAL SOLID STATE CIRCUITS CONFERENCE,US,IEEE INC. NEW YORK, (19940201), vol. 37, ISSN 0193-6530, pages 300 - 301,357, XP000507156 [X] 1,2,6 * the whole document *
 [X]  - TANOI S ET AL, "A 250-622 MHZ DESKEW AND JITTER-SUPPRESSED CLOCK BUFFER USING TWO-LOOP ARCHITECTURE", IEICE TRANSACTIONS ON ELECTRONICS,JP,INSTITUTE OF ELECTRONICS INFORMATION AND COMM. ENG. TOKYO, (19960701), vol. E79-C, no. 7, ISSN 0916-8524, pages 898 - 904, XP000632343 [X] 1,2 * page 900, column 1, line 10 - page 901, column 1, line 27; figures 5,6 *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.