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Extract from the Register of European Patents

EP About this file: EP0881672

EP0881672 - Isolation wall between power device [Right-click to bookmark this link]
StatusThe application has been refused
Status updated on  23.11.2007
Database last updated on 03.09.2024
Most recent event   Tooltip23.11.2007Refusal of applicationpublished on 26.12.2007  [2007/52]
Applicant(s)For all designated states
STMicroelectronics S.A.
29, Boulevard Romain Rolland
92120 Montrouge / FR
[2001/51]
Former [1999/05]For all designated states
STMicroelectronics S.A.
7, Avenue Galliéni
94250 Gentilly / FR
Former [1998/49]For all designated states
SGS-THOMSON MICROELECTRONICS S.A.
7, Avenue Galliéni
94250 Gentilly / FR
Inventor(s)01 / Duclos, Franck
2, rue de la barre
37000 Tours / FR
02 / Rami, Fabien
6 ter, rue Pierre de Ronsard
37230 Fondettes / FR
[1998/49]
Representative(s)de Beaumont, Michel, et al
1, rue Champollion
38000 Grenoble / FR
[1998/49]
Application number, filing date98410055.222.05.1998
[1998/49]
Priority number, dateFR1997000682228.05.1997         Original published format: FR 9706822
[1998/49]
Filing languageFR
Procedural languageFR
PublicationType: A1 Application with search report 
No.:EP0881672
Date:02.12.1998
Language:FR
[1998/49]
Search report(s)(Supplementary) European search report - dispatched on:EP02.10.1998
ClassificationIPC:H01L21/761, H01L27/08
[1998/49]
CPC:
H01L21/761 (EP,US); H01L27/0814 (EP,US); H01L27/0817 (EP,US)
Designated contracting statesDE,   FR,   GB,   IT [1999/32]
Former [1998/49]AT,  BE,  CH,  CY,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE 
TitleGerman:Isolationswanne für Leistungsbauteile[1998/49]
English:Isolation wall between power device[1998/49]
French:Mur d'isolement entre composants de puissance[1998/49]
Examination procedure25.05.1999Examination requested  [1999/29]
06.12.2004Despatch of a communication from the examining division (Time limit: M04)
14.01.2005Reply to a communication from the examining division
23.09.2005Despatch of a communication from the examining division (Time limit: M04)
09.11.2005Reply to a communication from the examining division
10.08.2007Despatch of communication that the application is refused, reason: substantive examination [2007/52]
20.08.2007Application refused, date of legal effect [2007/52]
Fees paidRenewal fee
15.05.2000Renewal fee patent year 03
14.05.2001Renewal fee patent year 04
14.05.2002Renewal fee patent year 05
13.05.2003Renewal fee patent year 06
13.05.2004Renewal fee patent year 07
12.05.2005Renewal fee patent year 08
23.03.2006Renewal fee patent year 09
29.05.2007Renewal fee patent year 10
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Documents cited:Search[DA]EP0721218  (SGS THOMSON MICROELECTRONICS [FR]) [DA] 1;
 [A]  - TSUTOMU YATSUO ET AL., "A Diode Integrated High Speed Thyristor", JOURNAL OF THE JAPAN SOCIETY OF APPLIED PHYSICS 1971 SUPPLEMENT, TOKYO, (197110), vol. 40, pages 99 - 104, XP002055120 [A] 1-4 * page 100, column R, paragraph L - page 102, column L; figure 4 *
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