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EP0942553
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EP About this file: EP0942553
| EP0942553 - Oversampling type clock recovery circuit with power consumption reduced [Right-click to bookmark this link] | Status | The application is deemed to be withdrawn Status updated on 26.11.2004 Database last updated on 11.09.2024 | Most recent event Tooltip | 26.11.2004 | Application deemed to be withdrawn | published on 12.01.2005 [2005/02] | Applicant(s) | For all designated states NEC Electronics Corporation 1753 Shimonumabe Nakahara-ku Kawasaki, Kanagawa 211-8668 / JP | [N/P] |
| Former [2003/18] | For all designated states NEC Electronics Corporation 1753 Shimonumabe, Nakahara-ku Kawasaki, Kanagawa 211-8668 / JP | ||
| Former [1999/37] | For all designated states NEC CORPORATION 7-1, Shiba 5-chome, Minato-ku Tokyo / JP | Inventor(s) | 01 /
Yoshida, Ichiro NEC Corporation, 7-1, Shiba 5-chome Minato-ku, Tokyo / JP | [1999/37] | Representative(s) | von Samson-Himmelstjerna, Friedrich, et al Samson & Partner Patentanwälte mbB Widenmayerstrasse 6 80538 München / DE | [N/P] |
| Former [1999/37] | von Samson-Himmelstjerna, Friedrich R., Dipl.-Phys., et al SAMSON & PARTNER Widenmayerstrasse 5 80538 München / DE | Application number, filing date | 99103813.4 | 26.02.1999 | [1999/37] | Priority number, date | JP19980061738 | 12.03.1998 Original published format: JP 6173898 | [1999/37] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0942553 | Date: | 15.09.1999 | Language: | EN | [1999/37] | Type: | A3 Search report | No.: | EP0942553 | Date: | 02.01.2004 | [2004/01] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 14.11.2003 | Classification | IPC: | H04L7/033, H03L7/08, H03L7/087 | [2004/01] | CPC: |
H03L7/087 (EP,US);
H03L7/00 (KR);
H03L7/081 (EP,US);
H04L7/033 (EP,US);
H04L7/0337 (EP,US);
Y10S331/02 (EP,US)
|
| Former IPC [1999/37] | H04L7/033, H03L7/08 | Designated contracting states | DE, FR, GB [2004/39] |
| Former [1999/37] | AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LI, LU, MC, NL, PT, SE | Title | German: | Taktrückgewinnungsschaltung mit überabtastung und vermindertem Leistungsverbrauch | [1999/37] | English: | Oversampling type clock recovery circuit with power consumption reduced | [1999/37] | French: | Circuit de récupération d'horloge à suréchantillonage et consommation réduite de l'énergie | [1999/37] | Examination procedure | 18.11.2003 | Examination requested [2004/03] | 26.02.2004 | Despatch of a communication from the examining division (Time limit: M04) | 08.07.2004 | Application deemed to be withdrawn, date of legal effect [2005/02] | 13.08.2004 | Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time [2005/02] | Fees paid | Renewal fee | 21.02.2001 | Renewal fee patent year 03 | 28.02.2002 | Renewal fee patent year 04 | 28.02.2003 | Renewal fee patent year 05 | 23.02.2004 | Renewal fee patent year 06 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]EP0402736 (FUJITSU LTD [JP], et al) [A] 1-19 * abstract * * column 3, paragraph L - column 4, paragraph L * * column 7, line 18 - line 27 * * column 8, paragraph 2 *; | [A]US5633899 (FIEDLER ALAN [US], et al) [A] 1-19 * abstract * * figure 5 * * column 2, line 11 - line 22 * * column 3, line 22 - line 27 * * column 3, line 61 - column 4, line 10 * * column 5, line 66 - column 6, line 33 * * column 6, line 66 - column 7, line 8 * * column 7, line 31 - line 50 *; | [A]US5428317 (SANCHEZ HECTOR [US], et al) [A] 1-19 * column 2, line 10 - line 35 *; | [A]US4841255 (OHBA MOTOI [JP], et al) [A] 1-19 * column 3, paragraph 2 * * column 5, line 29 - line 32 *; | [A] - INYEOL LEE ET AL, "A 622 Mb/s CMOS clock recovery PLL with time-interleaved phase detector array", SOLID-STATE CIRCUITS CONFERENCE, 1996. DIGEST OF TECHNICAL PAPERS. 42ND ISSCC., 1996 IEEE INTERNATIONAL SAN FRANCISCO, CA, USA 8-10 FEB. 1996, NEW YORK, NY, USA,IEEE, US, (19960208), ISBN 0-7803-3136-2, pages 198 - 199,444, XP010156453 [A] 1-19 * the whole document * DOI: http://dx.doi.org/10.1109/ISSCC.1996.488569 |