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EP1047077
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EP About this file: EP1047077
| EP1047077 - Nonvolatile memory device with double hierarchical decoding [Right-click to bookmark this link] | Status | The application is deemed to be withdrawn Status updated on 06.01.2006 Database last updated on 28.02.2026 | Most recent event Tooltip | 06.01.2006 | Application deemed to be withdrawn | published on 22.02.2006 [2006/08] | Applicant(s) | For all designated states STMicroelectronics Srl Via C. Olivetti, 2 20041 Agrate Brianza (Milano) / IT | [N/P] |
| Former [2000/43] | For all designated states STMicroelectronics S.r.l. Via C. Olivetti, 2 20041 Agrate Brianza (Milano) / IT | Inventor(s) | 01 /
Micheloni, Rino Via Luini 11 22078 Turate / IT | 02 /
Campardo, Giovanni Via G. Segantini 5 24128 Bergamo / IT | 03 /
Commodaro, Stefano Via Nenni 2 20060 Cassina de' Pecchi / IT | 04 /
Farina, Francesco Via G. da Palestrina 2 63023 Fermo / IT | [2000/43] | Representative(s) | Cerbaro, Elena, et al Studio Torta S.p.A. Via Viotti, 9 10121 Torino / IT | [N/P] |
| Former [2000/43] | Cerbaro, Elena, Dr., et al STUDIO TORTA S.r.l., Via Viotti, 9 10121 Torino / IT | Application number, filing date | 99830236.8 | 21.04.1999 | [2000/43] | Filing language | IT | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP1047077 | Date: | 25.10.2000 | Language: | EN | [2000/43] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 14.09.1999 | Classification | IPC: | G11C8/00, G11C16/06, G11C7/18 | [2000/43] | CPC: |
G11C16/08 (EP,US);
G11C5/025 (EP,US);
G11C7/18 (EP,US);
G11C8/10 (EP,US)
| Designated contracting states | DE, FR, GB, IT [2001/29] |
| Former [2000/43] | AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LI, LU, MC, NL, PT, SE | Title | German: | Nichtflüchtige Speicheranordnung mit doppelter hierarchischer Dekodierung | [2000/43] | English: | Nonvolatile memory device with double hierarchical decoding | [2000/43] | French: | Dispositif de mémoire non volatile à double décodage hiérarchique | [2000/43] | Examination procedure | 11.04.2001 | Examination requested [2001/25] | 27.01.2005 | Despatch of a communication from the examining division (Time limit: M06) | 09.08.2005 | Application deemed to be withdrawn, date of legal effect [2006/08] | 13.09.2005 | Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time [2006/08] | Fees paid | Renewal fee | 20.04.2001 | Renewal fee patent year 03 | 29.04.2002 | Renewal fee patent year 04 | 24.04.2003 | Renewal fee patent year 05 | 28.04.2004 | Renewal fee patent year 06 | 27.04.2005 | Renewal fee patent year 07 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [XA] CHEN T ET AL: "OPTIMIZATION OF THE NUMBER OF LEVELS OF HIERARCHY IN LARGE-SCALE HIERARCHICAL MEMORY SYSTEMS", PROCEEDINGS OF THE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, SAN DIEGO, MAY 10 - 13, 1992, vol. 5, no. CONF. 25, 10 May 1992 (1992-05-10), INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, pages 2104 - 2107, XP000338403, ISBN: 0-7803-0593-0 [A] 3 DOI: http://dx.doi.org/10.1109/ISCAS.1992.230578 | Examination | EP0798727 | US5896340 |