-
EP1147552
European procedure
- EP About this file
- EP Legal status
- EP Federated register
- EP Event history
- EP Citations
- EP Patent family
- EP All documents
Extract from the Register of European Patents
EP About this file: EP1147552
| EP1147552 - FIELD EFFECT TRANSISTOR STRUCTURE WITH ABRUPT SOURCE/DRAIN JUNCTIONS [Right-click to bookmark this link] | Status | The application has been withdrawn Status updated on 05.09.2003 Database last updated on 02.11.2024 | Most recent event Tooltip | 02.04.2004 | Change - designated states | published on 19.05.2004 [2004/21] | Applicant(s) | For all designated states Intel Corporation 2200 Mission College Boulevard Santa Clara, CA 95054 / US | [N/P] |
| Former [2001/43] | For all designated states INTEL CORPORATION 2200 Mission College Boulevard Santa Clara, CA 95052 / US | Inventor(s) | 01 /
MURTHY, Anand S. Apartment 1304, 1845 N.W. 173rd Avenue Beaverton, OR 97006 / US | 02 /
CHAU, Robert, S. 13525 S.W. Harness Lane Beaverton, OR 97008 / US | 03 /
MORROW, Patrick 6150 N.W. Simnasho Drive Portland, OR 97229 / US | 04 /
JAN, Chia-Hong 395 N.W. 176th Avenue Portland, OR 97229 / US | 05 /
PACKAN, Paul 15025 S.W. Gibralter Court Beaverton, OR 97007 / US | [2001/43] | Representative(s) | Molyneaux, Martyn William, et al Wildman, Harrold, Allen & Dixon LLP 11th Floor, Tower 3 Clements Inn London WC2A 1JA / GB | [N/P] |
| Former [2001/43] | Molyneaux, Martyn William, et al Wildman, Harrold, Allen & Dixon 11th Floor, Tower 3, Clements Inn London WC2A 2AZ / GB | Application number, filing date | 99972373.7 | 05.11.1999 | [2001/43] | WO1999US26224 | Priority number, date | US19980191076 | 12.11.1998 Original published format: US 191076 | [2001/43] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | WO0030169 | Date: | 25.05.2000 | Language: | EN | [2000/21] | Type: | A1 Application with search report | No.: | EP1147552 | Date: | 24.10.2001 | Language: | EN | The application published by WIPO in one of the EPO official languages on 25.05.2000 takes the place of the publication of the European patent application. | [2001/43] | Search report(s) | International search report - published on: | US | 25.05.2000 | Classification | IPC: | H01L21/336 | [2001/43] | CPC: |
H01L29/0847 (EP,US);
H01L21/18 (KR);
H01L29/1083 (EP);
H01L29/16 (EP);
H01L29/161 (EP);
H01L29/41766 (EP);
H01L29/41783 (EP);
H01L29/66477 (EP);
H01L29/66621 (EP);
H01L29/66636 (EP);
H01L21/02532 (US);
H01L21/02634 (US);
| Designated contracting states | DE, GB, IE [2004/21] |
| Former [2001/43] | AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LI, LU, MC, NL, PT, SE | Extension states | AL | Not yet paid | LT | Not yet paid | LV | Not yet paid | MK | Not yet paid | RO | Not yet paid | SI | Not yet paid | Title | German: | FELDEFFEKTTRANSISTORSTRUKTUR MIT ABRUPTEN SOURCE/DRAIN-ÜBERGANGEN | [2001/43] | English: | FIELD EFFECT TRANSISTOR STRUCTURE WITH ABRUPT SOURCE/DRAIN JUNCTIONS | [2001/43] | French: | STRUCTURE DE TRANSISTOR A EFFET DE CHAMP AUX JONCTIONS SOURCE/DRAIN ABRUPTES | [2001/43] | Entry into regional phase | 23.05.2001 | National basic fee paid | 23.05.2001 | Search fee paid | 23.05.2001 | Designation fee(s) paid | 23.05.2001 | Examination fee paid | Examination procedure | 31.05.2000 | Request for preliminary examination filed International Preliminary Examining Authority: US | 23.05.2001 | Amendment by applicant (claims and/or description) | 23.05.2001 | Examination requested [2001/43] | 22.08.2003 | Application withdrawn by applicant [2003/43] | Fees paid | Renewal fee | 22.11.2001 | Renewal fee patent year 03 | 25.11.2002 | Renewal fee patent year 04 |
| Opt-out from the exclusive Tooltip competence of the Unified Patent Court | See the Register of the Unified Patent Court for opt-out data | ||
| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Cited in | International search | [X]US4714685 (SCHUBERT PETER J [US]); | [Y]US4870029 (EASTER WILLIAM G [US], et al); | [Y]US5300447 (ANDERSON DIRK N [US]); | [X]US5504018 (SATO FUMIHIKO [JP]); | [X] - S. WOLF AND R.N. TAUBER., "Silicon Processing for the VLSI Era", PROCESS TECHNOLOGY,, vol. 1, pages 173-174 - 545-547, XP002926437 |