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Extract from the Register of European Patents

EP About this file: EP1186898

EP1186898 - Procedure and apparatus for testing printed circuit boards [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  03.11.2006
Database last updated on 24.04.2024
Most recent event   Tooltip05.12.2008Lapse of the patent in a contracting state
New state(s): CY
published on 07.01.2009  [2009/02]
Applicant(s)For all designated states
atg test systems GmbH & Co. KG
Reicholzheim, Zum Schlag 3
97877 Wertheim / DE
[2005/52]
Former [2002/11]For all designated states
atg test systems GmbH & Co. KG
Reicholzheim, Zum Schlag 3
97877 Wertheim / DE
Inventor(s)01 / Lutz, Günter
Wasenwiese 8
97892 Kreuzwertheim / DE
 [2002/11]
Representative(s)Ganahl, Bernhard, et al
Huber & Schüssler
Patentanwälte
Truderinger Strasse 246
81825 München / DE
[N/P]
Former [2004/51]Ganahl, Bernhard, et al
Huber & Schüssler Patentanwälte Truderinger Strasse 246
81825 München / DE
Former [2002/11]Ganahl, Bernhard, et al
Reinhardt Söllner Ganahl, Hausen 5b
85551 Kirchheim b. München / DE
Application number, filing date01119256.409.08.2001
[2002/11]
Priority number, dateDE200014372605.09.2000         Original published format: DE 10043726
[2002/11]
Filing languageDE
Procedural languageDE
PublicationType: A2 Application without search report 
No.:EP1186898
Date:13.03.2002
Language:DE
[2002/11]
Type: A3 Search report 
No.:EP1186898
Date:04.02.2004
[2004/06]
Type: B1 Patent specification 
No.:EP1186898
Date:28.12.2005
Language:DE
[2005/52]
Search report(s)(Supplementary) European search report - dispatched on:EP19.12.2003
ClassificationIPC:G01R31/28, G01R1/073, G01N21/41, G01N21/88, G01B11/06, G06K9/64
[2004/06]
CPC:
G01R31/2806 (EP)
Former IPC [2002/11]G01R31/28
Designated contracting statesAT,   BE,   CH,   CY,   DE,   DK,   ES,   FI,   FR,   GB,   GR,   IE,   IT,   LI,   LU,   MC,   NL,   PT,   SE,   TR [2002/11]
TitleGerman:Verfahren und Vorrichtung zum Prüfen von Leiterplatten[2002/11]
English:Procedure and apparatus for testing printed circuit boards[2002/11]
French:Procédé et appareil pour tester des circuits imprimés[2002/11]
Examination procedure05.07.2004Examination requested  [2004/36]
25.08.2004Despatch of a communication from the examining division (Time limit: M04)
17.11.2004Reply to a communication from the examining division
08.02.2005Communication of intention to grant the patent
13.04.2005Fee for grant paid
13.04.2005Fee for publishing/printing paid
Opposition(s)29.09.2006No opposition filed within time limit [2006/49]
Fees paidRenewal fee
28.05.2003Renewal fee patent year 03
31.08.2004Renewal fee patent year 04
20.07.2005Renewal fee patent year 05
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Patent Court
See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition  TooltipCY28.12.2005
IE28.12.2005
NL28.12.2005
TR28.12.2005
DK28.03.2006
GR28.03.2006
SE28.03.2006
ES08.04.2006
PT29.05.2006
LU09.08.2006
BE31.08.2006
CH31.08.2006
LI31.08.2006
MC31.08.2006
[2009/02]
Former [2008/37]IE28.12.2005
NL28.12.2005
TR28.12.2005
DK28.03.2006
GR28.03.2006
SE28.03.2006
ES08.04.2006
PT29.05.2006
LU09.08.2006
BE31.08.2006
CH31.08.2006
LI31.08.2006
MC31.08.2006
Former [2007/45]IE28.12.2005
NL28.12.2005
DK28.03.2006
GR28.03.2006
SE28.03.2006
ES08.04.2006
PT29.05.2006
BE31.08.2006
CH31.08.2006
LI31.08.2006
MC31.08.2006
Former [2007/36]IE28.12.2005
IT28.12.2005
NL28.12.2005
DK28.03.2006
GR28.03.2006
SE28.03.2006
ES08.04.2006
PT29.05.2006
BE31.08.2006
CH31.08.2006
LI31.08.2006
MC31.08.2006
Former [2007/30]IE28.12.2005
NL28.12.2005
DK28.03.2006
GR28.03.2006
SE28.03.2006
ES08.04.2006
PT29.05.2006
BE31.08.2006
CH31.08.2006
LI31.08.2006
MC31.08.2006
Former [2007/19]IE28.12.2005
NL28.12.2005
DK28.03.2006
GR28.03.2006
SE28.03.2006
ES08.04.2006
PT29.05.2006
MC31.08.2006
Former [2007/09]IE28.12.2005
NL28.12.2005
DK28.03.2006
GR28.03.2006
SE28.03.2006
ES08.04.2006
PT29.05.2006
Former [2006/51]IE28.12.2005
NL28.12.2005
DK28.03.2006
GR28.03.2006
SE28.03.2006
PT29.05.2006
Former [2006/48]IE28.12.2005
NL28.12.2005
GR28.03.2006
SE28.03.2006
PT29.05.2006
Former [2006/45]IE28.12.2005
NL28.12.2005
GR28.03.2006
SE28.03.2006
Former [2006/40]IE28.12.2005
GR28.03.2006
SE28.03.2006
Former [2006/38]GR28.03.2006
SE28.03.2006
Former [2006/27]SE28.03.2006
Documents cited:Search[A]DE2012446  (SIEMENS AG) [A] 1-11 * abstract * * page 2, paragraph 3 - page 10, paragraph 3; figures 1-3 *;
 [X]US4240750  (HURD WILLIAM A [US], et al) [X] 1-11 * column A * * column 1, line 20 - line 21 * * column 2, line 11 - column 6, line 40; figures 1-3 *;
 [A]DE3212190  (SIEMENS AG [DE]) [A] 1-11 * abstract * * page 7, line 10 - page 9, line 4; figures 1-3 *;
 [A]US4427496  (KATZ GEORGE [US]) [A] 1-11 * column A * * column 2, line 40 - column 4, line 47; figures 1-5 *;
 [A]US4570180  (BAIER HEINZ [DE], et al) [A] 1-11 * column A * * column 3, line 25 - column 10, line 65; figures 1-9B *;
 [A]US4650333  (CRABB ROBERT M [US], et al) [A] 1-11 * column A * * column 4, line 10 - column 10, line 60; figures 1-10 *;
 [A]US4721908  (DRILLER HUBERT [DE], et al) [A] 1-11 * column A ** column 2, line 59 - column 6, line 44; figures 1-6 *;
 [A]US4758782  (KOBAYASHI KOUJI [JP]) [A] 1-11 * column A * * column 2, line 63 - column 6, line 7; figures 1-5 *;
 [AD]EP0468153  (ATG ELECTRONIC GMBH [DE]) [AD] 1-11 * abstract * * column 6, line 34 - column 11, line 26; figures 1-5 *;
 [AD]WO9315474  (ORBOT SYSTEMS LTD [IL], et al) [AD] 1-11 * abstract *;
 [A]US5299268  (AMIR ISRAEL [US]) [A] 1-11 * column A * * column 3, line 19 - column 6, line 10; figures 1-4 *;
 [A]US5333052  (FINAROV MOSHE [IL]) [A] 1-11 * column A * * column 2, line 14 - column 3, line 58 *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.