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Extract from the Register of European Patents

EP About this file: EP1876714

EP1876714 - High speed digital to analog converter [Right-click to bookmark this link]
StatusThe application has been refused
Status updated on  31.05.2013
Database last updated on 17.05.2024
Most recent event   Tooltip31.05.2013Refusal of applicationpublished on 03.07.2013  [2013/27]
Applicant(s)For all designated states
Ciena Luxembourg S.a.r.l.
560A rue de Neudorf
2220 Luxembourg / LU
[2010/51]
Former [2008/02]For all designated states
Nortel Networks Limited
2351 Boulevard Alfred-Nobel
St Laurent, Québec H4S 2A9 / CA
Inventor(s)01 / Taraschuk, Terrance
60 Forrest Hill Avenue
Ottawa Ontario K2C 1P6 / CA
02 / Roberts, Kim
10 Mission Inn Grove
Nepean Ontario K2R 1C6 / CA
03 / Strawczynski, Leo
479 Highland Avenue
Ottawa Ontario K2A 2J5 / CA
 [2008/02]
Representative(s)Mabey, Katherine Frances, et al
Dehns
St Bride's House
10 Salisbury Square
London EC4Y 8JD / GB
[N/P]
Former [2012/22]Mabey, Katherine Frances, et al
Dehns St Bride's House 10 Salisbury Square
London EC4Y 8JD / GB
Former [2010/32]Jeffrey, Philip Michael, et al
Dehns St Bride's House 10 Salisbury Square London
EC4Y 8JD / GB
Former [2008/46]Ertl, Nicholas Justin
Elkington and Fife LLP Prospect House 8 Pembroke Road Sevenoaks
Kent TN13 1XR / GB
Former [2008/02]Hermele, Daniel Stephen
Nortel Networks Intellectual Property Law Group London Road
Harlow, Essex CM17 9NA / GB
Application number, filing date07018472.625.05.2004
[2008/02]
Priority number, dateUS2003045752810.06.2003         Original published format: US 457528
[2008/02]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP1876714
Date:09.01.2008
Language:EN
[2008/02]
Type: A3 Search report 
No.:EP1876714
Date:23.01.2008
[2008/04]
Search report(s)(Supplementary) European search report - dispatched on:EP20.12.2007
ClassificationIPC:H03M1/08
[2008/02]
CPC:
H03M1/0836 (EP,US); H01S3/0085 (EP); H03M1/74 (EP,US)
Designated contracting statesDE,   FR,   GB [2008/02]
TitleGerman:Schneller Analog-Digital-Wandler[2008/02]
English:High speed digital to analog converter[2008/02]
French:Convertisseur numérique-analogique à grande vitesse[2008/02]
Examination procedure16.04.2008Examination requested  [2008/22]
20.05.2008Despatch of a communication from the examining division (Time limit: M06)
26.11.2008Reply to a communication from the examining division
11.03.2010Despatch of a communication from the examining division (Time limit: M04)
21.07.2010Reply to a communication from the examining division
10.10.2012Application refused, date of legal effect [2013/27]
10.10.2012Date of oral proceedings
04.01.2013Minutes of oral proceedings despatched
07.01.2013Despatch of communication that the application is refused, reason: substantive examination [2013/27]
Parent application(s)   TooltipEP04734648.1  / EP1636905
Divisional application(s)The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued (EP20040734648) is  26.03.2007
Fees paidRenewal fee
21.01.2008Renewal fee patent year 03
21.01.2008Renewal fee patent year 04
18.04.2008Renewal fee patent year 05
22.04.2009Renewal fee patent year 06
07.05.2010Renewal fee patent year 07
11.05.2011Renewal fee patent year 08
26.03.2012Renewal fee patent year 09
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Documents cited:Search[XY]US4291277  (DAVIS ROBERT C, et al) [X] 1-3 * figure 4 * [Y] 4-7;
 [X]US4977403  (LARSON LAWRENCE E [US]) [X] 1 * figure 3 *;
 [A]US5394122  (CONWAY PATRICK H [US], et al) [A] 1-7 * figure 3 *;
 [Y]JP2000299662  (MITSUBISHI ELECTRIC CORP) [Y] 1,4,6 * abstract *;
 [A]EP1047185  (SECURICOR WIRELESS TECHNOLOGY [GB]) [A] 1-7 * figure 1 *;
 [XY]WO0108293  (WIRELESS SYSTEMS INT LTD [GB], et al) [X] 2,3 * figure 3 * [Y] 1,4-7;
 [XY]WO02067521  (QUELLAN INC [US]) [X] 1-3 * page 11, line 11 - line 13 * * page 17, line 19 - line 25 * * page 21, line 18 - line 20 * * page 20, lines 7-9 - lines 17-20; figure 6 * [Y] 4-7;
 [XY]  - CATALTEPE T ET AL, "Digitally corrected multi-bit Sigma Delta data converters", ISCAS, (19890508), pages 647 - 650, XP010084892 [X] 1,2 * page 647, column LEFT; figure 2 * [Y] 7
 [A]  - KAMOTO T ET AL, "AN 8-BIT 2-NS MONOLITHIC DAC", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE SERVICE CENTER, PISCATAWAY, NJ, US, (19880201), vol. 23, no. 1, ISSN 0018-9200, pages 142 - 146, XP000579903 [A] 1-7 * figure 1 *

DOI:   http://dx.doi.org/10.1109/4.270
ExaminationEP1876713
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