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Extract from the Register of European Patents

EP About this file: EP3208789

EP3208789 - METHOD OF PROTECTING A CIRCUIT AGAINST A SIDE-CHANNEL ANALYSIS [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  11.06.2021
Database last updated on 08.04.2026
FormerThe patent has been granted
Status updated on  03.07.2020
FormerGrant of patent is intended
Status updated on  04.03.2020
FormerExamination is in progress
Status updated on  10.08.2018
FormerRequest for examination was made
Status updated on  16.02.2018
FormerThe application has been published
Status updated on  21.07.2017
Most recent event   Tooltip06.09.2024Lapse of the patent in a contracting state
New state(s): MT		published on 09.10.2024  [2024/41]
Applicant(s)For all designated states
ESHARD
Technopole Bordeaux Montesquieu
1 Allée Jean Rostand
33650 Martillac / FR
[2017/34]
Inventor(s)01 / THIEBEAULD DE LA CROUEE, Hugues
ESHARD
13, rue Massenet
33600 Pessac / FR
02 / WURCKER, Antoine
ESHARD
5 rue Laurent Fignon
33140 VILLENAVE D'ORNON / FR
 [2017/34]
Representative(s)de Roquemaurel, Bruno, et al
Omnipat
24 place des Martyrs de la Résistance
13100 Aix en Provence / FR
[2017/34]
Application number, filing date17156289.515.02.2017
[2017/34]
Priority number, dateFR2016005144322.02.2016         Original published format: FR 1651443
FR2016005144422.02.2016         Original published format: FR 1651444
FR2016005144522.02.2016         Original published format: FR 1651445
[2017/34]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP3208789
Date:23.08.2017
Language:EN
[2017/34]
Type: B1 Patent specification 
No.:EP3208789
Date:05.08.2020
Language:EN
[2020/32]
Search report(s)(Supplementary) European search report - dispatched on:EP26.07.2017
ClassificationIPC:G09C1/00, H04L9/00
[2017/34]
CPC:
H04L9/003 (EP,CN,KR,US); G01R31/2851 (CN); G01R31/31719 (EP,US);
G06F21/556 (CN); G06F21/72 (US); G09C1/00 (EP,US);
H04L9/002 (CN,US); H04L9/0625 (CN); H04L9/0631 (CN);
H04L9/0656 (CN); H04L9/3242 (US); H04L9/3247 (US);
H04L9/3249 (US); H04L9/3252 (US); G06F21/75 (US);
G06F2221/034 (CN); H04L2209/08 (EP,US); H04L2209/12 (EP,US) (-)
Designated contracting statesAL,   AT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   MK,   MT,   NL,   NO,   PL,   PT,   RO,   RS,   SE,   SI,   SK,   SM,   TR [2018/12]
Former [2017/34]AL,  AT,  BE,  BG,  CH,  CY,  CZ,  DE,  DK,  EE,  ES,  FI,  FR,  GB,  GR,  HR,  HU,  IE,  IS,  IT,  LI,  LT,  LU,  LV,  MC,  MK,  MT,  NL,  NO,  PL,  PT,  RO,  RS,  SE,  SI,  SK,  SM,  TR 
TitleGerman:VERFAHREN ZUM SCHUTZ EINER SCHALTUNG GEGEN EINE SEITENKANALANALYSE[2017/34]
English:METHOD OF PROTECTING A CIRCUIT AGAINST A SIDE-CHANNEL ANALYSIS[2017/34]
French:PROCÉDÉ DE PROTECTION D'UN CIRCUIT CONTRE UNE ANALYSE PAR CANAUX AUXILIAIRES[2020/14]
Former [2017/34]PROCEDE DE PROTECTION D'UN CIRCUIT CONTRE UNE ANALYSE PAR CANAUX AUXILIAIRES
Examination procedure15.02.2017Date on which the examining division has become responsible
07.02.2018Amendment by applicant (claims and/or description)
07.02.2018Examination requested  [2018/12]
09.08.2018Despatch of a communication from the examining division (Time limit: M04)
29.11.2018Reply to a communication from the examining division
10.04.2019Despatch of a communication from the examining division (Time limit: M06)
10.10.2019Reply to a communication from the examining division
05.03.2020Communication of intention to grant the patent
25.06.2020Fee for grant paid
25.06.2020Fee for publishing/printing paid
25.06.2020Receipt of the translation of the claim(s)
Opposition(s)07.05.2021No opposition filed within time limit [2021/28]
Fees paidRenewal fee
25.02.2019Renewal fee patent year 03
25.02.2020Renewal fee patent year 04
Opt-out from the exclusive  Tooltip
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition  TooltipHU15.02.2017
AL05.08.2020
AT05.08.2020
CY05.08.2020
CZ05.08.2020
DK05.08.2020
EE05.08.2020
ES05.08.2020
FI05.08.2020
HR05.08.2020
IT05.08.2020
LT05.08.2020
LV05.08.2020
MC05.08.2020
MK05.08.2020
MT05.08.2020
NL05.08.2020
PL05.08.2020
RO05.08.2020
RS05.08.2020
SE05.08.2020
SI05.08.2020
SK05.08.2020
SM05.08.2020
TR05.08.2020
BG05.11.2020
NO05.11.2020
GR06.11.2020
IS05.12.2020
PT07.12.2020
IE15.02.2021
LU15.02.2021
BE28.02.2021
CH28.02.2021
LI28.02.2021
[2024/41]
Former [2024/29]HU15.02.2017
AL05.08.2020
AT05.08.2020
CY05.08.2020
CZ05.08.2020
DK05.08.2020
EE05.08.2020
ES05.08.2020
FI05.08.2020
HR05.08.2020
IT05.08.2020
LT05.08.2020
LV05.08.2020
MC05.08.2020
MK05.08.2020
NL05.08.2020
PL05.08.2020
RO05.08.2020
RS05.08.2020
SE05.08.2020
SI05.08.2020
SK05.08.2020
SM05.08.2020
TR05.08.2020
BG05.11.2020
NO05.11.2020
GR06.11.2020
IS05.12.2020
PT07.12.2020
IE15.02.2021
LU15.02.2021
BE28.02.2021
CH28.02.2021
LI28.02.2021
Former [2024/22]HU15.02.2017
AL05.08.2020
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EE05.08.2020
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FI05.08.2020
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MK05.08.2020
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SK05.08.2020
SM05.08.2020
BG05.11.2020
NO05.11.2020
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IS05.12.2020
PT07.12.2020
IE15.02.2021
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BE28.02.2021
CH28.02.2021
LI28.02.2021
Former [2023/30]HU15.02.2017
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FI05.08.2020
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MC05.08.2020
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SE05.08.2020
SI05.08.2020
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BG05.11.2020
NO05.11.2020
GR06.11.2020
IS05.12.2020
PT07.12.2020
IE15.02.2021
LU15.02.2021
BE28.02.2021
CH28.02.2021
LI28.02.2021
Former [2023/27]HU15.02.2017
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BG05.11.2020
NO05.11.2020
GR06.11.2020
IS05.12.2020
PT07.12.2020
IE15.02.2021
LU15.02.2021
BE28.02.2021
CH28.02.2021
LI28.02.2021
Former [2022/34]AL05.08.2020
AT05.08.2020
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DK05.08.2020
EE05.08.2020
ES05.08.2020
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IT05.08.2020
LT05.08.2020
LV05.08.2020
MC05.08.2020
NL05.08.2020
PL05.08.2020
RO05.08.2020
RS05.08.2020
SE05.08.2020
SI05.08.2020
SK05.08.2020
SM05.08.2020
BG05.11.2020
NO05.11.2020
GR06.11.2020
IS05.12.2020
PT07.12.2020
IE15.02.2021
LU15.02.2021
BE28.02.2021
CH28.02.2021
LI28.02.2021
Former [2022/07]AL05.08.2020
AT05.08.2020
CZ05.08.2020
DK05.08.2020
EE05.08.2020
ES05.08.2020
FI05.08.2020
HR05.08.2020
IT05.08.2020
LT05.08.2020
LV05.08.2020
MC05.08.2020
NL05.08.2020
PL05.08.2020
RO05.08.2020
RS05.08.2020
SE05.08.2020
SI05.08.2020
SK05.08.2020
SM05.08.2020
BG05.11.2020
NO05.11.2020
GR06.11.2020
IS05.12.2020
PT07.12.2020
IE15.02.2021
LU15.02.2021
CH28.02.2021
LI28.02.2021
Former [2021/47]AL05.08.2020
AT05.08.2020
CZ05.08.2020
DK05.08.2020
EE05.08.2020
ES05.08.2020
FI05.08.2020
HR05.08.2020
IT05.08.2020
LT05.08.2020
LV05.08.2020
MC05.08.2020
NL05.08.2020
PL05.08.2020
RO05.08.2020
RS05.08.2020
SE05.08.2020
SI05.08.2020
SK05.08.2020
SM05.08.2020
BG05.11.2020
NO05.11.2020
GR06.11.2020
IS05.12.2020
PT07.12.2020
LU15.02.2021
CH28.02.2021
LI28.02.2021
Former [2021/41]AL05.08.2020
AT05.08.2020
CZ05.08.2020
DK05.08.2020
EE05.08.2020
ES05.08.2020
FI05.08.2020
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IT05.08.2020
LT05.08.2020
LV05.08.2020
MC05.08.2020
NL05.08.2020
PL05.08.2020
RO05.08.2020
RS05.08.2020
SE05.08.2020
SI05.08.2020
SK05.08.2020
SM05.08.2020
BG05.11.2020
NO05.11.2020
GR06.11.2020
IS05.12.2020
PT07.12.2020
Former [2021/36]AL05.08.2020
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EE05.08.2020
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IT05.08.2020
LT05.08.2020
LV05.08.2020
NL05.08.2020
PL05.08.2020
RO05.08.2020
RS05.08.2020
SE05.08.2020
SI05.08.2020
SK05.08.2020
SM05.08.2020
BG05.11.2020
NO05.11.2020
GR06.11.2020
IS05.12.2020
PT07.12.2020
Former [2021/34]AL05.08.2020
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EE05.08.2020
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FI05.08.2020
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IT05.08.2020
LT05.08.2020
LV05.08.2020
NL05.08.2020
PL05.08.2020
RO05.08.2020
RS05.08.2020
SE05.08.2020
SK05.08.2020
SM05.08.2020
BG05.11.2020
NO05.11.2020
GR06.11.2020
IS05.12.2020
PT07.12.2020
Former [2021/28]AL05.08.2020
AT05.08.2020
CZ05.08.2020
DK05.08.2020
EE05.08.2020
ES05.08.2020
FI05.08.2020
HR05.08.2020
LT05.08.2020
LV05.08.2020
NL05.08.2020
PL05.08.2020
RO05.08.2020
RS05.08.2020
SE05.08.2020
SK05.08.2020
SM05.08.2020
BG05.11.2020
NO05.11.2020
GR06.11.2020
IS05.12.2020
PT07.12.2020
Former [2021/25]AL05.08.2020
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DK05.08.2020
EE05.08.2020
ES05.08.2020
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LT05.08.2020
LV05.08.2020
NL05.08.2020
PL05.08.2020
RO05.08.2020
RS05.08.2020
SE05.08.2020
SM05.08.2020
BG05.11.2020
NO05.11.2020
GR06.11.2020
IS05.12.2020
PT07.12.2020
Former [2021/22]AT05.08.2020
CZ05.08.2020
DK05.08.2020
EE05.08.2020
ES05.08.2020
FI05.08.2020
HR05.08.2020
LT05.08.2020
LV05.08.2020
NL05.08.2020
PL05.08.2020
RO05.08.2020
RS05.08.2020
SE05.08.2020
SM05.08.2020
BG05.11.2020
NO05.11.2020
GR06.11.2020
IS05.12.2020
PT07.12.2020
Former [2021/21]AT05.08.2020
DK05.08.2020
ES05.08.2020
FI05.08.2020
HR05.08.2020
LT05.08.2020
LV05.08.2020
NL05.08.2020
PL05.08.2020
RS05.08.2020
SE05.08.2020
BG05.11.2020
NO05.11.2020
GR06.11.2020
IS05.12.2020
PT07.12.2020
Former [2021/12]AT05.08.2020
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HR05.08.2020
LT05.08.2020
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RS05.08.2020
SE05.08.2020
BG05.11.2020
NO05.11.2020
GR06.11.2020
IS05.12.2020
PT07.12.2020
Former [2021/10]AT05.08.2020
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FI05.08.2020
HR05.08.2020
LT05.08.2020
LV05.08.2020
PL05.08.2020
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SE05.08.2020
BG05.11.2020
NO05.11.2020
GR06.11.2020
IS05.12.2020
PT07.12.2020
Former [2021/09]AT05.08.2020
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FI05.08.2020
LT05.08.2020
SE05.08.2020
BG05.11.2020
NO05.11.2020
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PT07.12.2020
Former [2021/08]ES05.08.2020
FI05.08.2020
LT05.08.2020
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BG05.11.2020
NO05.11.2020
PT07.12.2020
Former [2021/07]FI05.08.2020
LT05.08.2020
NO05.11.2020
Documents cited:Search[Y] US2003223580  (SNELL DORIAN L et al.)
 [IAY]   JACQUES FOURNIER ET AL: "Design and characterisation of an AES chip embedding countermeasures", INTERNATIONAL JOURNAL OF INTELLIGENT ENGINEERING INFORMATICS, 1 January 2011 (2011-01-01), pages 328, XP055319803, Retrieved from the Internet DOI: 10.1504/IJIEI.2011.044101

DOI:   http://dx.doi.org/10.1504/IJIEI.2011.044101
 [IY]   JOYE M ET AL: "Strengthening hardware AES implementations against fault attacks", 20070910, vol. 1, no. 3, 10 September 2007 (2007-09-10), pages 106 - 110, XP006029490
 [IAY]   FRAIDY BOUESSE ET AL: "Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits", 10 October 2006, CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS - CHES 2006 LECTURE NOTES IN COMPUTER SCIENCE;;LNCS, SPRINGER, BERLIN, DE, PAGE(S) 384 - 398, ISBN: 978-3-540-46559-1, XP047029591
by applicant  P. C. KOCHER: "Advances in Cryptology - CRYPTO '96", vol. 1109, 1996, SPRINGER, article "Timing attacks on implementations of Diffie-Hellman, RSA, DSS, and other systems", pages: 104 - 113
   P. C. KOCHER; J. JAFFE; B. JUN: "Advances in Cryptology - CRYPTO '99", vol. 1666, 1999, SPRINGER, article "Differential Power Analysis", pages: 388 - 397
   E. BRIER; C. CLAVIER; F. OLIVIER: "Cryptographic Hardware and Embedded Systems - CHES 2004", vol. 3156, 2004, SPRINGER, article "Correlation Power Analysis with a Leakage Model", pages: 16 - 29
   J.-J. QUISQUATER: "Smart Card Programming and Security", vol. 2140, 2001, SPRINGER, article "ElectroMagnetic Analysis (EMA): Measures and Counter-measures for Smart Cards", pages: 200 - 210
   S. CHARI; J. R. RAO; P. ROHATGI: "CHES 2002", vol. 2523, 2003, SPRINGER, article "Template Attacks", pages: 172 - 186
   B. GIERLICHS; L. BATINA; P. TUYLS; B. PRENEEL: "CHES 2008", vol. 5154, 2008, SPRINGER, article "Mutual Information Analysis", pages: 426 - 442
   E. BIHAM: "A fast new DES implementation in software", FAST SOFTWARE ENCRYPTION, vol. 1267, 2006, pages 260 - 272
   C. REBEIRO; D. SELVAKUMAR: "Bitslice Implementation of AES", A. S. L. DEVI CRYPTOLOGY AND NETWORK SECURITY, vol. 4301, 2006, pages 203 - 212, XP019051490
   M. AGOYAN; S. BOUQUET; J.-M. DUTERTRE; J. FOURNIER; J.-B. RIGAUD; B.ROBISSON; A. TRIA: "Design and characterization of an AES chip embedding countermeasures", INTERNATIONAL JOURNAL OF INTELLIGENT ENGINEERING INFORMATICS, 2011, pages 328, XP055319803, DOI: doi:10.1504/IJIEI.2011.044101

DOI:   http://dx.doi.org/10.1504/IJIEI.2011.044101
   M. JOYE; P. MANET; J.-B. RIGAUD: "Strengthening hardware AES implementation against fault attacks", IET INFORMATION SECURITY, vol. 1, no. 3, 2007, pages 106 - 110, XP006029490
   F. BOUESSE; G. SICARD; M. RENAUDIN: "Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits", CHES 2006, LNCS, vol. 4249, 2006, pages 384 - 398
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