EP0053014 - Clock generator circuit [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 04.02.1986 Database last updated on 24.04.2024 | Most recent event Tooltip | 04.02.1986 | No opposition filed within time limit | published on 26.03.1986 [1986/13] | Applicant(s) | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi Kanagawa 211 / JP | [N/P] |
Former [1982/22] | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi, Kanagawa 211 / JP | Inventor(s) | 01 /
Ito, Akihiko 3780, Suge Tama-ku Kawasaki-shi Kanagawa 214 / JP | 02 /
Tanaka, Hisami 1-17-3-301, Utsukushigaoka Midori-ku Yokohama-shi Kanagawa 227 / JP | 03 /
Takayama, Yoshihisa 616, Futako Takatsu-ku Kawasaki-shi Kanagawa 213 / JP | 04 /
Kato, Seiji 3-14-15, Chuorinkan Yamato-shi Kanagawa 242 / JP | [1982/22] | Representative(s) | Fane, Christopher Robin King, et al Haseltine Lake & Co., Imperial House, 15-19 Kingsway London WC2B 6UD / GB | [N/P] |
Former [1982/22] | Fane, Christopher Robin King, et al HASELTINE LAKE & CO. Hazlitt House 28 Southampton Buildings Chancery Lane London, WC2A 1AT / GB | Application number, filing date | 81305484.8 | 20.11.1981 | [1982/22] | Priority number, date | JP19800163607 | 20.11.1980 Original published format: JP 16360780 | [1982/22] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP0053014 | Date: | 02.06.1982 | Language: | EN | [1982/22] | Type: | B1 Patent specification | No.: | EP0053014 | Date: | 03.04.1985 | Language: | EN | [1985/14] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 16.03.1982 | Classification | IPC: | H03K5/15 | [1982/22] | CPC: |
H03K5/1515 (EP,US)
| Designated contracting states | DE, FR, GB, NL [1982/22] | Title | German: | Taktgeberschaltung | [1982/22] | English: | Clock generator circuit | [1982/22] | French: | Circuit de générateur de signaux d'horloge | [1982/22] | Examination procedure | 30.11.1982 | Examination requested [1983/06] | 18.08.1983 | Despatch of a communication from the examining division (Time limit: M04) | 18.12.1983 | Reply to a communication from the examining division | 25.06.1984 | Despatch of communication of intention to grant (Approval: ) | 24.09.1984 | Communication of intention to grant the patent | 28.11.1984 | Fee for grant paid | 28.11.1984 | Fee for publishing/printing paid | Opposition(s) | 04.01.1986 | No opposition filed within time limit [1986/13] | Fees paid | Renewal fee | 10.11.1983 | Renewal fee patent year 03 | 15.11.1984 | Renewal fee patent year 04 |
Opt-out from the exclusive Tooltip competence of the Unified Patent Court | See the Register of the Unified Patent Court for opt-out data | ||
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | JP56006525 [ ]; | JP52127051 [ ]; | GB2030403 [ ] (SIEMENS AG); | US3668436 [ ] (BACON STANLEY H); | US3961269 [ ] (ALVAREZ JR CESAR E); | US4140927 [ ] (FEUCHT CHARLES A); | FR2379198 [ ] (THOMSON CSF [FR]); | FR2064528 [ ] (COMPTEURS COMP D); | US3858061 [ ] (CARPENTER R, et al); | US4066919 [ ] (HUNTINGTON ROBERT CHARLES) | [ ] - IBM Technical Disclosure Bulletin Vol. 20, No. 6, November 1977 F.K. ALLEN "Multiphase Clocking System with Delay Tracking for Control and/or Data Systems" pages 2419 and 2420 * complete article * | [ ] - Electronic Engineering, Vol. 50, No. 616 December 1978 S.J. CAHILL "A Single-Chip Two-Phase Clock" pages 27, 29 * complete article * | [ ] - Electronics, 20 January 1977 N. HECKT "Two-Phase Clock Features Nonoverlapping Outputs" page 99 * complete article * | [ ] - PATENT ABSTRACTS OF JAPAN Vol. 5, No. 55, 16 April 1981; & JP-A-56 006 525, & JP56006525 A 19810416 | [ ] - PATENT ABSTRACTS OF JAPAN Vol. 2, No. 10, 25 January 1978 page 10409E77; & JP-A-52 127 051, & JP52127051 A 19780125 |