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EP0126424
European procedure
Extract from the Register of European Patents
EP About this file: EP0126424
| EP0126424 - Process for making polycide structures [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 28.09.1991 Database last updated on 15.05.2024 | Most recent event Tooltip | 07.03.1997 | Lapse of the patent in a contracting state | published on 23.04.1997 [1997/17] | Applicant(s) | For all designated states International Business Machines Corporation New Orchard Road Armonk, NY 10504 / US | [N/P] |
| Former [1984/48] | For all designated states International Business Machines Corporation Old Orchard Road Armonk, N.Y. 10504 / US | Inventor(s) | 01 /
Roberts, Stanley 5 Beechwood Lane South Burlington Vermont 05401 / US | 02 /
White, Francis Roger 66 Greenfield Road Essex Junction Vermont 05452 / US | [1984/48] | Representative(s) | Mönig, Anton IBM Deutschland Informationssysteme GmbH, Patentwesen und Urheberrecht 70548 Stuttgart / DE | [N/P] |
| Former [1990/27] | Mönig, Anton, Dipl.-Ing. IBM Deutschland Informationssysteme GmbH, Patentwesen und Urheberrecht D-70548 Stuttgart / DE | ||
| Former [1984/48] | Oechssler, Dietrich, Dr. rer. nat. IBM Deutschland GmbH Patentwesen und Urheberrecht Schönaicher Strasse 220 D-71032 Böblingen / DE | Application number, filing date | 84105540.3 | 16.05.1984 | [1984/48] | Priority number, date | US19830497372 | 23.05.1983 Original published format: US 497372 | [1984/48] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0126424 | Date: | 28.11.1984 | Language: | EN | [1984/48] | Type: | A3 Search report | No.: | EP0126424 | Date: | 13.01.1988 | Language: | EN | [1988/02] | Type: | B1 Patent specification | No.: | EP0126424 | Date: | 28.11.1990 | Language: | EN | [1990/48] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 25.11.1987 | Classification | IPC: | H01L21/28, H01L21/31 | [1984/48] | CPC: |
H01L29/66575 (EP,US);
H01L21/0272 (EP,US);
H01L21/28061 (EP,US);
H01L21/28123 (EP,US);
H01L21/32134 (EP,US);
H01L21/32137 (EP,US);
H01L21/7688 (EP,US);
H01L21/76889 (EP,US);
Y10S148/084 (EP,US);
Y10S438/951 (EP,US)
(-)
| Designated contracting states | DE, FR, GB [1984/48] | Title | German: | Verfahren zur Herstellung von Polycide-Strukturen | [1984/48] | English: | Process for making polycide structures | [1984/48] | French: | Procédé pour la fabrication des structures en polyciures | [1984/48] | Examination procedure | 23.11.1984 | Examination requested [1985/06] | 02.08.1989 | Despatch of a communication from the examining division (Time limit: M04) | 30.11.1989 | Reply to a communication from the examining division | 19.01.1990 | Despatch of communication of intention to grant (Approval: Yes) | 23.05.1990 | Communication of intention to grant the patent | 19.06.1990 | Fee for grant paid | 19.06.1990 | Fee for publishing/printing paid | Opposition(s) | 29.08.1991 | No opposition filed within time limit [1991/47] | Fees paid | Renewal fee | 23.05.1986 | Renewal fee patent year 03 | 29.05.1987 | Renewal fee patent year 04 | 31.05.1988 | Renewal fee patent year 05 | 30.05.1989 | Renewal fee patent year 06 | 19.05.1990 | Renewal fee patent year 07 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [Y]JP55165636 | [Y] - PATENT ABSTRACTS OF JAPAN, vol. 5, no. 44 (E-50)[716], 24th March 1981; & JP-A-55 165 636 (TOSHIHIKO FUKUYAMA) 24-12-1980, & JP55165636 A 00000000 | [YD] - IBM TECHNICAL DISCLOSURE BULLETIN, vol. 24, no. 9, February 1982, page 4486, New York, US; R.S. BENNETT et al.: "Process for reactive ion etching of polycide" | [A] - IEEE JOURNAL OF SOLID STATE CIRCUITS, vol. SC-15, no. 4, August 1980, pages 482-489, New York, US; H.J. GEIPEL, Jr. et al.: "Composite silicide gate electrodes - Interconnections for VLSI device technologies" | [A] - IEEE TRANSACTIONS ON ELECTRON DEVICES, vol. ED-26, no. 4, April 1979, pages 369-371, New York,US; B.L. CROWDER et al.: "1 Mum-MOSFET VLSI technology: Part VII - Metal silicide interconnection technology - A future perspective" |