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Extract from the Register of European Patents

EP About this file: EP0215583

EP0215583 - Bipolar and/or MOS devices fabricated on integrated circuit substrates [Right-click to bookmark this link]
StatusThe application is deemed to be withdrawn
Status updated on  24.11.1992
Database last updated on 24.04.2024
Most recent event   Tooltip07.07.2007Change - inventorpublished on 08.08.2007  [2007/32]
Applicant(s)For all designated states
ADVANCED MICRO DEVICES, INC.
901 Thompson Place P.O. Box 3453
Sunnyvale CA 94088-3453 / US
[N/P]
Former [1987/13]For all designated states
ADVANCED MICRO DEVICES, INC.
901 Thompson Place P.O. Box 3453
Sunnyvale, CA 94088 / US
Inventor(s)01 / Thomas, Mammen
1081 Corvette Drive
San Jose California 95120 / US
02 / Weinberg, Matthew
111 North Rengstorff
Mt. View California 94043 / US
[1987/13]
Representative(s)Sanders, Peter Colin Christopher, et al
Brookes Batchellor 1 Boyne Park Tunbridge Wells
Kent TN4 8EL / GB
[N/P]
Former [1987/13]Sanders, Peter Colin Christopher, et al
BROOKES & MARTIN High Holborn House 52/54 High Holborn
London WC1V 6SE / GB
Application number, filing date86306397.019.08.1986
[1987/13]
Priority number, dateUS1985077714918.09.1985         Original published format: US 777149
US1986086975902.06.1986         Original published format: US 869759
[1987/13]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0215583
Date:25.03.1987
Language:EN
[1987/13]
Type: A3 Search report 
No.:EP0215583
Date:23.08.1989
Language:EN
[1989/34]
Search report(s)(Supplementary) European search report - dispatched on:EP05.07.1989
ClassificationIPC:H01L27/06, H01L23/52, H01L21/82, H01L21/90
[1989/35]
CPC:
H01L27/0623 (EP,US); H01L21/76819 (EP,US); H01L21/8249 (EP,US);
Y10S257/90 (EP,US)
Former IPC [1987/13]H01L27/06, H01L23/52, H01L21/90
Designated contracting statesAT,   BE,   CH,   DE,   FR,   GB,   IT,   LI,   LU,   NL,   SE [1987/13]
TitleGerman:Bipolare/MOS-Bauelemente auf IC-Substraten[1987/13]
English:Bipolar and/or MOS devices fabricated on integrated circuit substrates[1987/13]
French:Dispositifs bipolaires/MOS sur des substrats à circuits intégrés[1987/13]
File destroyed:12.06.1999
Examination procedure12.02.1990Examination requested  [1990/16]
27.11.1991Despatch of a communication from the examining division (Time limit: M06)
09.04.1992Reply to a communication from the examining division
11.05.1992Despatch of a communication from the examining division (Time limit: M02)
22.07.1992Application deemed to be withdrawn, date of legal effect  [1993/02]
20.08.1992Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time  [1993/02]
Fees paidRenewal fee
20.08.1988Renewal fee patent year 03
26.08.1989Renewal fee patent year 04
14.08.1990Renewal fee patent year 05
23.08.1991Renewal fee patent year 06
Penalty fee
Additional fee for renewal fee
31.08.199207   M06   Not yet paid
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Documents cited:Search[X]EP0110211  (IBM [US]);
 [Y]EP0145927  (IBM [US]);
 [E]EP0203836  (EFCIS [FR]);
 [A]WO8504049  (ADVANCED MICRO DEVICES INC [US])
 [Y]  - IBM TECHNICAL DISCLOSURE BULLETIN. vol. 24, no. 5, October 1981, pages 2543-44, New York, US; H.J. GEIPEL et al.: "Method for making an FET having high conductivity gate, source and drain electrodes".
 [A]  - IBM TECHNICAL DISCLOSURE BULLETIN. vol. 25, no. 8, January 1983, pages 4433-4435, New York, US; I. ANTIPOV et al.: "Polysilicon-base transistor structure with improved characteristics".
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.