-
EP0343989
European procedure
Extract from the Register of European Patents
EP About this file: EP0343989
| EP0343989 - Data processing systems with delayed cache write [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 02.08.1996 Database last updated on 11.04.2026 | Most recent event Tooltip | 07.02.1997 | Lapse of the patent in a contracting state New state(s): CH, LI | published on 26.03.1997 [1997/13] | Applicant(s) | For all designated states International Business Machines Corporation New Orchard Road Armonk, NY 10504 / US | [N/P] |
| Former [1989/48] | For all designated states International Business Machines Corporation Old Orchard Road Armonk, N.Y. 10504 / US | Inventor(s) | 01 /
Begun, Ralph Murray 32 SW 13th Avenue Boca Raton Florida 33486 / US | 02 /
Bland, Patrick Maurice 4535 Palm Ridge Blvd Delray Beach Florida 33445 / US | 03 /
Dean, Mark Edward 5054 Beechwood Road Delray Beach Florida 33484 / US | [1989/48] | Representative(s) | Burt, Roger James IBM United Kingdom Limited Intellectual Property Department Hursley Park Winchester Hampshire SO21 2JN / GB | [N/P] |
| Former [1989/48] | Burt, Roger James, Dr. IBM United Kingdom Limited Intellectual Property Department Hursley Park Winchester Hampshire SO21 2JN / GB | Application number, filing date | 89305307.4 | 25.05.1989 | [1989/48] | Priority number, date | US19880198890 | 26.05.1988 Original published format: US 198890 | [1989/48] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0343989 | Date: | 29.11.1989 | Language: | EN | [1989/48] | Type: | A3 Search report | No.: | EP0343989 | Date: | 13.03.1991 | Language: | EN | [1991/11] | Type: | B1 Patent specification | No.: | EP0343989 | Date: | 27.09.1995 | Language: | EN | [1995/39] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 24.01.1991 | Classification | IPC: | G06F12/08 | [1989/48] | CPC: |
G06F12/0802 (EP,US);
G06F13/40 (KR)
| Designated contracting states | AT, BE, CH, DE, ES, FR, GB, IT, LI, NL, SE [1989/48] | Title | German: | Datenverarbeitungssystem mit verzögertem Cache-Schreibvorgang | [1989/48] | English: | Data processing systems with delayed cache write | [1989/48] | French: | Système de traitement de données avec écriture en antémémoire retardée | [1989/48] | Examination procedure | 26.03.1990 | Examination requested [1990/21] | 22.12.1993 | Despatch of a communication from the examining division (Time limit: M04) | 23.04.1994 | Reply to a communication from the examining division | 29.12.1994 | Despatch of communication of intention to grant (Approval: Yes) | 03.04.1995 | Communication of intention to grant the patent | 25.04.1995 | Fee for grant paid | 25.04.1995 | Fee for publishing/printing paid | Opposition(s) | 28.06.1996 | No opposition filed within time limit [1996/38] | Fees paid | Renewal fee | 13.12.1990 | Renewal fee patent year 03 | 21.05.1992 | Renewal fee patent year 04 | 19.05.1993 | Renewal fee patent year 05 | 19.05.1994 | Renewal fee patent year 06 | 19.05.1995 | Renewal fee patent year 07 |
| Opt-out from the exclusive Tooltip competence of the Unified Patent Court | See the Register of the Unified Patent Court for opt-out data | ||
| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | AT | 27.09.1995 | CH | 27.09.1995 | LI | 27.09.1995 | [1997/13] |
| Former [1996/28] | AT | 27.09.1995 | Documents cited: | Search | [AD] 82385 HIGH PERFORMANCE 32-BIT CACHE CONTROLLER, October 1987, pages 2-65, Intel Corp., Santa Clara, US [AD] | [A] ELECTRONICS, vol. 60, no. 12, 11th June 1987, pages 74-76, New York, US; B.C. COLE: "How a cache control chip supercharges 386 processor" [A] | [A] ELECTRONICS & WIRELESS WORLD, vol. 93, no. 1621, November 1987, pages 1121-1123, Sutton, Surrey, GB; D. JONES et al.: "The 68030" [A] |