EP0670598 - Method of manufacturing a ceramic circuit board [Right-click to bookmark this link] | |||
Former [1995/36] | Ceramic circuit board and manufacturing method thereof | ||
[2000/34] | Status | No opposition filed within time limit Status updated on 13.07.2002 Database last updated on 17.09.2024 | Most recent event Tooltip | 13.07.2002 | No opposition filed within time limit | published on 28.08.2002 [2002/35] | Applicant(s) | For all designated states SHINKO ELECTRIC INDUSTRIES CO. LTD. 711, Aza Shariden, Oaza Kurita Nagano-shi Nagano 380 / JP | [N/P] |
Former [1995/36] | For all designated states SHINKO ELECTRIC INDUSTRIES CO. LTD. 711, Aza Shariden, Oaza Kurita Nagano-shi, Nagano 380 / JP | Inventor(s) | 01 /
Horiuchi, Michio, c/o Shinko Elec. Ind. Co. Ltd. 711 Aza Shariden, Oaza Kurita Nagano-shi, Nagano 380 / JP | 02 /
Harayama, Yoichi, c/o Shinko Elec. Ind. Co. Ltd. 711 Aza Shariden, Oaza Kurita Nagano-shi, Nagano 380 / JP | [1995/36] | Representative(s) | Rackham, Stephen Neil Gill Jennings & Every LLP Broadgate House 7 Eldon Street London EC2M 7LH / GB | [N/P] |
Former [1995/36] | Rackham, Stephen Neil GILL JENNINGS & EVERY, Broadgate House, 7 Eldon Street London EC2M 7LH / GB | Application number, filing date | 95301373.7 | 02.03.1995 | [1995/36] | Priority number, date | JP19940033652 | 03.03.1994 Original published format: JP 3365294 | [1995/36] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0670598 | Date: | 06.09.1995 | Language: | EN | [1995/36] | Type: | A3 Search report | No.: | EP0670598 | Date: | 10.04.1996 | [1996/15] | Type: | B1 Patent specification | No.: | EP0670598 | Date: | 05.09.2001 | Language: | EN | [2001/36] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 23.02.1996 | Classification | IPC: | H01L23/538, H01L21/48, H01L23/498 | [1996/15] | CPC: |
H05K3/4061 (EP,US);
H01L21/4857 (EP,US);
H01L21/486 (EP,US);
H01L21/4867 (EP,US);
H05K1/092 (EP,US);
H05K1/0306 (EP,US);
H05K2201/0317 (EP,US);
H05K2203/025 (EP,US);
H05K2203/1383 (EP,US);
H05K3/245 (EP,US);
H05K3/4611 (EP,US);
H05K3/4629 (EP,US);
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Former IPC [1995/36] | H01L23/538, H01L21/48 | Designated contracting states | DE, FR, GB [1995/36] | Title | German: | Verfahren zur Herstellung einer keramischen Leiterplatte | [2000/34] | English: | Method of manufacturing a ceramic circuit board | [2000/34] | French: | Procédé de fabrication d'une carte de circuit céramique | [2000/34] |
Former [1995/36] | Keramische Leiterplatte und Herstellungsverfahren | ||
Former [1995/36] | Ceramic circuit board and manufacturing method thereof | ||
Former [1995/36] | Carte de circuit céramique et procédé de fabrication | Examination procedure | 09.10.1996 | Examination requested [1996/49] | 30.04.1997 | Despatch of a communication from the examining division (Time limit: M04) | 15.07.1997 | Reply to a communication from the examining division | 12.01.1998 | Despatch of a communication from the examining division (Time limit: M04) | 04.05.1998 | Reply to a communication from the examining division | 13.01.1999 | Despatch of communication that the application is refused, reason: substantive examination {1} | 14.07.1999 | Despatch of a communication from the examining division (Time limit: M04) | 10.11.1999 | Reply to a communication from the examining division | 29.11.2000 | Despatch of communication of intention to grant (Approval: Yes) | 09.03.2001 | Communication of intention to grant the patent | 30.05.2001 | Fee for grant paid | 30.05.2001 | Fee for publishing/printing paid | Appeal following examination | 12.03.1999 | Appeal received | 14.05.1999 | Statement of grounds filed | 14.07.1999 | Interlocutory revision of appeal | Opposition(s) | 06.06.2002 | No opposition filed within time limit [2002/35] | Fees paid | Renewal fee | 12.03.1997 | Renewal fee patent year 03 | 10.03.1998 | Renewal fee patent year 04 | 11.03.1999 | Renewal fee patent year 05 | 13.03.2000 | Renewal fee patent year 06 | 16.03.2001 | Renewal fee patent year 07 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]JPH05235549 ; | [A]JPH03276797 ; | [Y]EP0444216 (FUJITSU LTD [JP]) [Y] 1-12 * column W *; | [DY]US5229213 (HORIUCHI MICHIO [JP], et al) [DY] 1-12 * column W *; | [PX]EP0587382 (SHINKO ELECTRIC IND CO [JP]) [PX] 1-12* column W * | [A] - PATENT ABSTRACTS OF JAPAN, (19931217), vol. 17, no. 691, Database accession no. (E - 1479), & JP5235549 A 00000000 (IBIDEN) [A] 1-12 * abstract * | [A] - PATENT ABSTRACTS OF JAPAN, (19920310), vol. 16, no. 97, Database accession no. (E - 1176), & JP3276797 A 00000000 (FUJITSU) [A] 1-12 * abstract * | [A] - S.J. STEIN ET AL., "Base Metal Thick Film Conductors", SOLID STATE TECHNOLOGY, WASHINGTON US, vol. 24, no. 1, pages 73 - 79,110 [A] * the whole document * |